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Searched refs:ACPU_SC_CPUx_RVBARADDR (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhisi_pwrc.c77 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(0), sec_entrypoint >> 2); in hisi_pwrc_setup()
78 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(1), sec_entrypoint >> 2); in hisi_pwrc_setup()
79 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(2), sec_entrypoint >> 2); in hisi_pwrc_setup()
80 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(3), sec_entrypoint >> 2); in hisi_pwrc_setup()
81 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(4), sec_entrypoint >> 2); in hisi_pwrc_setup()
82 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(5), sec_entrypoint >> 2); in hisi_pwrc_setup()
83 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(6), sec_entrypoint >> 2); in hisi_pwrc_setup()
84 mmio_write_32(ACPU_SC_CPUx_RVBARADDR(7), sec_entrypoint >> 2); in hisi_pwrc_setup()
/external/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dhi6220_regs_acpu.h207 #define ACPU_SC_CPUx_RVBARADDR(x) ((x < 8) ? (ACPU_SC_CPU0_RVBARADDR + 0x100 * x) : ACPU_SC_CPU0_R… macro