Home
last modified time | relevance | path

Searched refs:ACTLR_EL1_PMSTATE_MASK (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
Dplat_psci_handlers.c134 val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK; in tegra_soc_pwr_domain_off()
167 val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK; in tegra_soc_pwr_domain_suspend()
/external/arm-trusted-firmware/plat/nvidia/tegra/include/
Dtegra_private.h25 #define ACTLR_EL1_PMSTATE_MASK (ULL(0xF) << 0) macro
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/drivers/mce/
Dnvg.c197 val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK; in nvg_enter_cstate()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dnvg.c36 val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK; in nvg_enter_cstate()