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Searched refs:ADDE (Results 1 – 25 of 104) sorted by relevance

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/external/llvm/lib/Target/Mips/
DMips16ISelDAGToDAG.cpp195 case ISD::ADDE: { in trySelect()
199 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) || in trySelect()
204 if (Opcode == ISD::ADDE) { in trySelect()
DMipsSEISelDAGToDAG.cpp245 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) || in selectAddESubE()
739 case ISD::ADDE: { in trySelect()
/external/llvm-project/llvm/test/CodeGen/RISCV/
Daddc-adde-sube-subc.ll5 ; Ensure that the ISDOpcodes ADDC, ADDE, SUBC, SUBE are handled correctly
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiAluCode.h122 case ISD::ADDE: in isdToLanaiAluCode()
/external/llvm-project/llvm/lib/Target/Lanai/
DLanaiAluCode.h122 case ISD::ADDE: in isdToLanaiAluCode()
/external/llvm/lib/Target/Lanai/
DLanaiAluCode.h123 case ISD::ADDE: in isdToLanaiAluCode()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h223 ADDE, SUBE, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h233 ADDE, SUBE, enumerator
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h272 ADDE, enumerator
/external/llvm-project/llvm/test/CodeGen/PowerPC/
Daix-cc-byval-split.ll49 ; CHECK32: renamable $r3 = ADDE killed renamable $r7, killed renamable $r[[REG2]], implicit-def…
/external/pcre/dist2/src/sljit/
DsljitNativePPC_32.c129 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)); in emit_single_op()
DsljitNativePPC_64.c264 return push_inst(compiler, ADDE | D(dst) | A(src1) | B(src2)); in emit_single_op()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEISelDAGToDAG.cpp220 assert(Opc == ISD::ADDE && "ISD::ADDE not in a chain of ADDE nodes!"); in selectAddE()
764 case ISD::ADDE: { in trySelect()
/external/llvm/lib/Target/ARM/
DARMISelLowering.h72 ADDE, // Add using carry enumerator
/external/llvm-project/llvm/lib/Target/Mips/
DMipsSEISelDAGToDAG.cpp220 assert(Opc == ISD::ADDE && "ISD::ADDE not in a chain of ADDE nodes!"); in selectAddE()
764 case ISD::ADDE: { in trySelect()
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp227 case ISD::ADDE: return "adde"; in getOperationName()
/external/llvm/lib/Target/BPF/
DBPFISelLowering.cpp91 setOperationAction(ISD::ADDE, MVT::i64, Expand); in BPFTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.h105 ADDE, // Add using carry enumerator
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp99 ISD::SRA_PARTS, ISD::SRL_PARTS, ISD::ADDC, ISD::ADDE, ISD::SUBC, in WebAssemblyTargetLowering()
/external/llvm-project/llvm/lib/Target/ARM/
DARMISelLowering.h107 ADDE, // Add using carry enumerator
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1556 setOperationAction(ISD::ADDE, MVT::i32, Custom); in SparcTargetLowering()
1562 setOperationAction(ISD::ADDE, MVT::i64, Custom); in SparcTargetLowering()
2910 case ISD::ADDC: hiOpc = ISD::ADDE; break; in LowerADDC_ADDE_SUBC_SUBE()
2911 case ISD::ADDE: hasChain = true; break; in LowerADDC_ADDE_SUBC_SUBE()
3059 case ISD::ADDE: in LowerOperation()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1549 setOperationAction(ISD::ADDE, MVT::i32, Custom); in SparcTargetLowering()
1555 setOperationAction(ISD::ADDE, MVT::i64, Custom); in SparcTargetLowering()
2904 case ISD::ADDC: hiOpc = ISD::ADDE; break; in LowerADDC_ADDE_SUBC_SUBE()
2905 case ISD::ADDE: hasChain = true; break; in LowerADDC_ADDE_SUBC_SUBE()
3053 case ISD::ADDE: in LowerOperation()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp290 case ISD::ADDE: return "adde"; in getOperationName()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp294 case ISD::ADDE: return "adde"; in getOperationName()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1834 setOperationAction(ISD::ADDE, MVT::i8, Expand); in HexagonTargetLowering()
1835 setOperationAction(ISD::ADDE, MVT::i16, Expand); in HexagonTargetLowering()
1836 setOperationAction(ISD::ADDE, MVT::i32, Expand); in HexagonTargetLowering()
1837 setOperationAction(ISD::ADDE, MVT::i64, Expand); in HexagonTargetLowering()

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