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Searched refs:ADDR2 (Results 1 – 19 of 19) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/ARM/GlobalISel/
Darm-legalize-load-store.mir111 ; CHECK-NEXT: [[ADDR2:%[0-9]+]]:_(p0) = G_PTR_ADD [[ADDR1]], [[OFF]]
112 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[ADDR2]]
115 ; CHECK-NEXT: G_STORE [[V2]](s32), [[ADDR2]](p0) :: (store 4 + 4, align 1)
148 ; CHECK-NEXT: [[ADDR2:%[0-9]+]]:_(p0) = G_PTR_ADD [[ADDR1]], [[OFF]]
149 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY [[ADDR2]]
152 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY [[ADDR2]]
159 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:_(p0) = COPY [[ADDR2]]
162 ; CHECK-NEXT: G_STORE [[V2]](s32), [[ADDR2]](p0) :: (store 4 + 4)
Darm-irtranslator.ll560 ; CHECK-DAG: [[ADDR2:%[0-9]+]]:_(p0) = G_PTR_ADD [[ADDR1]], [[OFFSET]](s32)
561 ; CHECK-DAG: [[VAL2:%[0-9]+]]:_(s32) = G_LOAD [[ADDR2]](p0) :: (load 4 from %ir.addr + 4)
563 ; CHECK-DAG: [[ADDR3:%[0-9]+]]:_(p0) = COPY [[ADDR2]]
/external/llvm-project/lld/test/ELF/
Demit-relocs-merge.s13 # CHECK-NEXT: [[ADDR2:[0-9a-f]+]] R_X86_64_64 zed 0x0
17 # CHECK-NEXT: [[ADDR2]] R_X86_64_64 zed 0x0
Dppc64-got-to-pcrel-relaxation.s285 # CHECK-S-NEXT: pstxsd 1, [[#ADDR2:]]
313 # CHECK-S-NEXT: pstxsd 1, [[#ADDR2+4]]
/external/llvm/test/CodeGen/X86/
Dfma-do-not-commute.ll12 ; CHECK: vmovss (%rsi), [[ADDR2:%xmm[0-9]+]]
14 ; CHECK: vfmadd231ss (%rdi), [[ADDR2]], %xmm0
Dcodegen-prepare-addrmode-sext.ll317 ; CHECK: [[ADDR2:%[a-zA-Z_0-9-]+]] = inttoptr i64 [[BASE2]] to i32*
318 ; CHECK: load i32, i32* [[ADDR2]]
336 ; CHECK-GEP: [[ADDR2:%[a-zA-Z_0-9-]+]] = bitcast i8* [[FULL2]] to i32*
337 ; CHECK-GEP: load i32, i32* [[ADDR2]]
/external/llvm-project/llvm/test/Transforms/PhaseOrdering/
Dpr39282.ll24 ; CHECK-NEXT: [[ADDR2I_1:%.*]] = getelementptr inbounds i32, i32* [[ADDR2:%.*]], i64 1
26 ; CHECK-NEXT: store i32 [[X_I]], i32* [[ADDR2]], align 4, !alias.scope !3, !noalias !0
/external/libpcap/
Dgrammar.h99 ADDR2 = 305, enumerator
222 #define ADDR2 305 macro
Dgrammar.y.in360 %token TYPE SUBTYPE DIR ADDR1 ADDR2 ADDR3 ADDR4 RA TA
523 | ADDR2 { $$ = Q_ADDR2; }
Dscanner.l320 address2|addr2 return ADDR2;
Dgrammar.c434 ADDR2 = 305, enumerator
557 #define ADDR2 305 macro
Dscanner.c3752 return ADDR2;
/external/llvm-project/llvm/test/DebugInfo/X86/
Dundef-fragment.ll29 ; CHECK-NEXT: [[ADDR1]], [[ADDR2:0x[0-9a-f]+]]): DW_OP_piece 0x4, DW_OP_constu 0x1c8, DW_OP_stack_v…
30 ; CHECK-NEXT: [[ADDR2]], {{0x[0-9a-f]+}}): DW_OP_constu 0x315, DW_OP_stack_value, DW_OP_piece 0x4, …
/external/llvm-project/llvm/test/tools/llvm-objcopy/ELF/
Dihex-writer.test22 …py -O ihex --only-section=.text3 %t-sec2 %t-sec2-3.hex 2>&1 | FileCheck %s --check-prefix=BAD-ADDR2
71 # BAD-ADDR2: error: {{.*}}: Section '.text3' address range [0x{{.*}}, 0x{{.*}}] is not 32 bit
/external/tcpdump/
Dprint-802_11.c1752 #define ADDR2 (p + 10) in get_data_src_dst_mac() macro
1759 *srcp = ADDR2; in get_data_src_dst_mac()
1769 *srcp = ADDR2; in get_data_src_dst_mac()
1779 #undef ADDR2 in get_data_src_dst_mac()
1822 #define ADDR2 (p + 10) in data_header_print() macro
1828 etheraddr_string(ndo, ADDR1), etheraddr_string(ndo, ADDR2), in data_header_print()
1832 etheraddr_string(ndo, ADDR1), etheraddr_string(ndo, ADDR2), in data_header_print()
1836 etheraddr_string(ndo, ADDR1), etheraddr_string(ndo, ADDR2), in data_header_print()
1840 etheraddr_string(ndo, ADDR1), etheraddr_string(ndo, ADDR2), in data_header_print()
1845 #undef ADDR2 in data_header_print()
/external/llvm-project/llvm/test/Transforms/LoopSimplify/
Dbasictest.ll176 ; CHECK-NEXT: [[ADDR2:%.*]] = load volatile i8*, i8** [[ADDR_PTR]]
177 ; CHECK-NEXT: indirectbr i8* [[ADDR2]], [label [[LOOP_BACKEDGE:%.*]], label %exit.c]
/external/llvm-project/llvm/test/Transforms/Coroutines/
Dcoro-async.ll116 ; CHECK: [[ADDR2:%.*]] = bitcast i8* [[ALLOCA_PRJ2]] to i64*
118 ; CHECK: store i64 1, i64* [[ADDR2]]
149 ; CHECK: [[ADDR2:%.*]] = bitcast i8* [[ALLOCA_PRJ2]] to i64*
155 ; CHECK: [[VAL2:%.*]] = load i64, i64* [[ADDR2]]
/external/llvm-project/llvm/test/Transforms/InstCombine/
Dload-bitcast-select.ll58 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND:%.*]], float* [[ADDR1:%.*]], float* [[ADDR2:%.*]]
/external/llvm-project/llvm/test/CodeGen/X86/
Dcodegen-prepare-addrmode-sext.ll320 ; CHECK: [[ADDR2:%[a-zA-Z_0-9-]+]] = bitcast i8* [[FULL2]] to i32*
321 ; CHECK: load i32, i32* [[ADDR2]]