Searched refs:ADDR_ASSERT (Results 1 – 14 of 14) sorted by relevance
94 #define ADDR_ASSERT(__e) \ macro100 #define ADDR_ASSERT(__e) if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } macro103 #define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case")104 #define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented");107 #define ADDR_ASSERT(__e) { ADDR_ANALYSIS_ASSUME(__e); } macro109 #define ADDR_ASSERT(__e) macro337 ADDR_ASSERT(dim > 0); in IsPow2()352 ADDR_ASSERT(dim > 0); in IsPow2()371 ADDR_ASSERT(IsPow2(align)); in PowTwoAlign()390 ADDR_ASSERT(IsPow2(align)); in PowTwoAlign()[all …]
242 ADDR_ASSERT(localIn.mipLevel == 0); in ComputeSurfaceInfo()264 ADDR_ASSERT(IsLinear(localIn.tileMode)); in ComputeSurfaceInfo()300 ADDR_ASSERT(localIn.pTileInfo); in ComputeSurfaceInfo()329 ADDR_ASSERT(!IsMacroTiled(localIn.tileMode)); in ComputeSurfaceInfo()373 ADDR_ASSERT((pOut->pitchAlign % 32) == 0); in ComputeSurfaceInfo()495 ADDR_ASSERT(!IsMacroTiled(input.tileMode)); in ComputeSurfaceAddrFromCoord()575 ADDR_ASSERT(!IsMacroTiled(input.tileMode)); in ComputeSurfaceCoordFromAddr()879 ADDR_ASSERT(macroModeIndex != TileIndexInvalid); in ComputeFmaskInfo()934 ADDR_ASSERT(pIn->numSamples > 1); in ComputeFmaskAddrFromCoord()978 ADDR_ASSERT(pIn->numSamples > 1); in ComputeFmaskCoordFromAddr()[all …]
393 ADDR_ASSERT((ord < 32) || (bit == 0)); in solveAddr()428 ADDR_ASSERT((ord < 32) || (bit == 0)); in solveAddr()429 ADDR_ASSERT(dim < DIM_S); in solveAddr()445 ADDR_ASSERT(dim < DIM_S); in solveAddr()548 ADDR_ASSERT(m_numBits > 0); in mort2d()564 ADDR_ASSERT(m_numBits > 0); in mort3d()
211 ADDR_ASSERT(IsLinear(localIn.swizzleMode)); in ComputeSurfaceInfo()318 ADDR_ASSERT(pOut->surfSize != 0); in ComputeSurfaceInfo()1419 ADDR_ASSERT(IsThin(resourceType, swizzleMode)); in ComputeThinBlockDimension()1496 ADDR_ASSERT(IsThick(resourceType, swizzleMode)); in ComputeThickBlockDimension()1502 ADDR_ASSERT(microBlockSizeTableIndex < sizeof(Block1K_3d) / sizeof(Block1K_3d[0])); in ComputeThickBlockDimension()1553 ADDR_ASSERT(IsThin(resourceType, swizzleMode)); in GetMipTailDim()1591 ADDR_ASSERT(IsThin(pIn->resourceType, pIn->swizzleMode)); in ComputeSurface2DMicroBlockOffset()1669 ADDR_ASSERT(IsThick(pIn->resourceType, pIn->swizzleMode)); in ComputeSurface3DMicroBlockOffset()1775 ADDR_ASSERT(macroBlockBits >= m_pipeInterleaveLog2); in GetPipeXorBits()1930 ADDR_ASSERT(pOut->bpp >= 8); in ComputeQbStereoInfo()[all …]
309 ADDR_ASSERT(alignment <= m_maxBaseAlign); in ValidBaseAlignments()316 ADDR_ASSERT(metaAlignment <= m_maxMetaBaseAlign); in ValidMetaBaseAlignments()
706 ADDR_ASSERT(!"Invalid number type"); in GetCompType()956 ADDR_ASSERT(0); in PixGetColorCompInfo()1023 ADDR_ASSERT(0); in PixGetDepthCompInfo()1147 ADDR_ASSERT(pBpp != NULL); in AdjustSurfaceInfo()1148 ADDR_ASSERT(pWidth != NULL && pHeight != NULL && pBasePitch != NULL); in AdjustSurfaceInfo()1277 ADDR_ASSERT(pBpp != NULL); in RestoreSurfaceInfo()1278 ADDR_ASSERT(pWidth != NULL && pHeight != NULL); in RestoreSurfaceInfo()
323 ADDR_ASSERT(family != ADDR_CHIP_FAMILY_IVLD); in SetChipFamily()
865 ADDR_ASSERT(actualMipLevels >= pIn->numMipLevels); in VerifyMipLevelInfo()
193 ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); in HwlComputeHtileInfo()304 ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); in HwlComputeCmaskInfo()403 ADDR_ASSERT(IsRtOptSwizzle(pIn->swizzleMode)); in HwlComputeDccInfo()436 ADDR_ASSERT(pIn->firstMipIdInTail <= pIn->numMipLevels); in HwlComputeDccInfo()520 ADDR_ASSERT(pIn->cMaskFlags.pipeAligned == TRUE); in HwlComputeCmaskAddrFromCoord()838 ADDR_ASSERT(m_pipeInterleaveBytes == ADDR_PIPEINTERLEAVE_256B); in HwlInitGlobalParams()876 ADDR_ASSERT((m_numPkrLog2 <= m_pipesLog2) && ((m_pipesLog2 - m_numPkrLog2) <= 2)); in HwlInitGlobalParams()981 ADDR_ASSERT(!"Unknown chip revision"); in HwlConvertChipFamily()986 ADDR_ASSERT(!"Unknown chip family"); in HwlConvertChipFamily()1029 ADDR_ASSERT(IsThick(resourceType, swizzleMode)); in GetBlk256SizeLog2()[all …]
216 ADDR_ASSERT(0 == (pIn->colorSurfSize & 0xff)); in HwlComputeDccInfo()228 ADDR_ASSERT(IsPow2(fastClearBaseAlign)); in HwlComputeDccInfo()248 ADDR_ASSERT(IsPow2(pOut->dccRamBaseAlign)); in HwlComputeDccInfo()412 ADDR_ASSERT(!"No Chip found"); in HwlConvertChipFamily()576 ADDR_ASSERT(index < static_cast<INT_32>(m_noOfEntries)); in HwlPostCheckTileIndex()631 ADDR_ASSERT((macroModeIndex != TileIndexInvalid) && in HwlSetupTileCfg()743 … ADDR_ASSERT((MinDepth2DThinIndex <= pOut->tileIndex) && (MaxDepth2DThinIndex >= pOut->tileIndex)); in HwlComputeSurfaceInfo()799 ADDR_ASSERT(tileMode == ADDR_TM_2D_TILED_THIN1 || in HwlComputeFmaskInfo()805 ADDR_ASSERT(m_tileTable[14].mode == ADDR_TM_2D_TILED_THIN1); in HwlComputeFmaskInfo()806 ADDR_ASSERT(m_tileTable[15].mode == ADDR_TM_3D_TILED_THIN1); in HwlComputeFmaskInfo()[all …]
199 ADDR_ASSERT(!"Invalid pipe config"); in GetPipePerSurf()1230 ADDR_ASSERT(pTileInfo != NULL); in HwlComputeTileDataWidthAndHeightLinear()1748 ADDR_ASSERT(pIn->width == expPitch); in HwlPreHandleBaseLvl3xPitch()1758 ADDR_ASSERT(IsPow2(expPitch)); in HwlPreHandleBaseLvl3xPitch()1880 ADDR_ASSERT(numSamples == 1); in HwlGetSizeAdjustmentMicroTiled()1932 ADDR_ASSERT(!"No Chip found"); in HwlConvertChipFamily()2030 ADDR_ASSERT(bpp != 128); in HwlSetupTileInfo()2037 ADDR_ASSERT(numSamples == 4); in HwlSetupTileInfo()2347 ADDR_ASSERT(m_logicalBanks <= 16); in DecodeGbRegs()2523 ADDR_ASSERT(pTileInfo->bankWidth == 1 && pTileInfo->macroAspectRatio > 1); in HwlComputeSurfaceCoord2DFromBankPipe()[all …]
124 ADDR_ASSERT(pOut->pTileInfo); in DispatchComputeSurfaceInfo()250 ADDR_ASSERT((pIn->width % 8) == 0); in ComputeSurfaceInfoLinear()293 ADDR_ASSERT((pIn->pitchAlign % pOut->pitchAlign) == 0); in ComputeSurfaceInfoLinear()310 ADDR_ASSERT((pIn->heightAlign % pOut->heightAlign) == 0); in ComputeSurfaceInfoLinear()581 ADDR_ASSERT(Thickness(expTileMode) == 1); in ComputeSurfaceInfoMacroTiled()807 ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); in HwlReduceBankWidthHeight()1061 ADDR_ASSERT(valid == TRUE); in SanityCheckMacroTiled()1064 ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); in SanityCheckMacroTiled()1181 ADDR_ASSERT(IsMacroTiled(pIn->tileMode)); in HwlGetAlignmentInfoMacroTiled()1185 ADDR_ASSERT(pIn->pTileInfo); in HwlGetAlignmentInfoMacroTiled()[all …]
212 ADDR_ASSERT((metaBlkDimDbg.w == metaBlkDim.w) && (metaBlkDimDbg.h == metaBlkDim.h)); in HwlComputeHtileInfo()279 ADDR_ASSERT(pIn->resourceType == ADDR_RSRC_TEX_2D); in HwlComputeCmaskInfo()328 ADDR_ASSERT((metaBlkDimDbg.w == metaBlkDim.w) && (metaBlkDimDbg.h == metaBlkDim.h)); in HwlComputeCmaskInfo()706 ADDR_ASSERT((m_settings.applyAliasFix == FALSE) || (m_pipeInterleaveLog2 <= 10u)); in HwlComputeMaxMetaBaseAlignments()1108 ADDR_ASSERT(m_pipeInterleaveBytes == ADDR_PIPEINTERLEAVE_256B); in HwlInitGlobalParams()1206 ADDR_ASSERT(m_settings.isVega10 == FALSE); in HwlInitGlobalParams()1208 ADDR_ASSERT(m_settings.isRaven == FALSE); in HwlInitGlobalParams()1210 ADDR_ASSERT(m_settings.isVega20 == FALSE); in HwlInitGlobalParams()1303 ADDR_ASSERT(!"No Chip found"); in HwlConvertChipFamily()1788 ADDR_ASSERT(dataSurfaceType == Gfx9DataColor); in GenMetaEquation()[all …]
569 ADDR_ASSERT(pLib != NULL); in AddrGetVersion()593 ADDR_ASSERT(pLib != NULL); in AddrUseTileIndex()617 ADDR_ASSERT(pLib != NULL); in AddrUseCombinedSwizzle()847 ADDR_ASSERT(returnCode == ADDR_OK); in ElemGetExportNorm()