Searched refs:ADDR_SW_64KB_R_X (Results 1 – 6 of 6) sorted by relevance
96 (1u << ADDR_SW_64KB_R_X);118 const UINT_32 Gfx10RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) |126 (1u << ADDR_SW_64KB_R_X) |153 (1u << ADDR_SW_64KB_R_X) |161 (1u << ADDR_SW_64KB_R_X);180 (1u << ADDR_SW_64KB_R_X);193 (1u << ADDR_SW_64KB_R_X);
387 if (pIn->swizzleMode != ADDR_SW_64KB_Z_X && pIn->swizzleMode != ADDR_SW_64KB_R_X) in HwlComputeDccInfo()677 (pIn->swizzleMode != ADDR_SW_64KB_R_X) || in HwlComputeDccAddrFromCoord()2795 swMode[AddrBlockThin64KB] = ADDR_SW_64KB_R_X; in HwlGetPreferredSurfaceSetting()4196 ADDR_SW_64KB_R_X, in HwlComputeMaxMetaBaseAlignments()4197 m_blockVarSizeLog2 ? ADDR_SW_VAR_R_X : ADDR_SW_64KB_R_X, in HwlComputeMaxMetaBaseAlignments()4227 ADDR_SW_64KB_R_X, in HwlComputeMaxMetaBaseAlignments()4228 m_blockVarSizeLog2 ? ADDR_SW_VAR_R_X : ADDR_SW_64KB_R_X, in HwlComputeMaxMetaBaseAlignments()
116 (1u << ADDR_SW_64KB_R_X);143 (1u << ADDR_SW_64KB_R_X);152 (1u << ADDR_SW_64KB_R_X);200 (1u << ADDR_SW_64KB_R_X);
261 ADDR_SW_64KB_R_X = 27, enumerator
1284 return sw_mode == ADDR_SW_64KB_Z_X || sw_mode == ADDR_SW_64KB_R_X; in is_dcc_supported_by_CB()2061 case ADDR_SW_64KB_R_X: in gfx9_compute_surface()
316 surface->u.gfx9.surf.swizzle_mode = ADDR_SW_64KB_R_X; in si_init_surface()