Searched refs:ADDR_SW_LINEAR (Results 1 – 6 of 6) sorted by relevance
79 const UINT_32 Gfx10LinearSwModeMask = (1u << ADDR_SW_LINEAR);145 const UINT_32 Gfx10Rsrc3dSwModeMask = (1u << ADDR_SW_LINEAR) |174 const UINT_32 Dcn20NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |189 const UINT_32 Dcn21NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |
2773 pOut->swizzleMode = ADDR_SW_LINEAR; in HwlGetPreferredSurfaceSetting()2785 AddrSwizzleMode swMode[AddrBlockMaxTiledType] = {ADDR_SW_LINEAR}; in HwlGetPreferredSurfaceSetting()
90 const UINT_32 Gfx9LinearSwModeMask = (1u << ADDR_SW_LINEAR);192 const UINT_32 Dce12NonBpp32SwModeMask = (1u << ADDR_SW_LINEAR) |206 const UINT_32 Dcn1NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |219 const UINT_32 Dcn2NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |
3614 pOut->swizzleMode = ADDR_SW_LINEAR; in HwlGetPreferredSurfaceSetting()3626 AddrSwizzleMode swMode[AddrBlockMaxTiledType] = {ADDR_SW_LINEAR}; in HwlGetPreferredSurfaceSetting()
1286 return sw_mode != ADDR_SW_LINEAR; in is_dcc_supported_by_CB()1405 surf->u.gfx9.surf.swizzle_mode == ADDR_SW_LINEAR) { in gfx9_compute_miptree()1421 if (in->swizzleMode == ADDR_SW_LINEAR) { in gfx9_compute_miptree()1432 assert(in->swizzleMode != ADDR_SW_LINEAR); in gfx9_compute_miptree()1736 if (in->swizzleMode != ADDR_SW_LINEAR && in->resourceType == ADDR_RSRC_TEX_2D && in gfx9_compute_miptree()1916 AddrSurfInfoIn.swizzleMode = ADDR_SW_LINEAR; in gfx9_compute_surface()1977 surf->is_linear = surf->u.gfx9.surf.swizzle_mode == ADDR_SW_LINEAR; in gfx9_compute_surface()2045 case ADDR_SW_LINEAR: in gfx9_compute_surface()
234 ADDR_SW_LINEAR = 0, enumerator