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Searched refs:ADDR_TILEINFO (Results 1 – 10 of 10) sorted by relevance

/external/mesa3d/src/amd/addrlib/src/r800/
Degbaddrlib.h111 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
126 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const;
164 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
186 ADDR_TILEINFO* pTileInfo) const = 0;
195 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const = 0;
202 ADDR_TILEINFO* pTileInfo) const = 0;
205 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const;
211 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type,
231 virtual UINT_32 HwlStereoCheckRightOffsetPadding(ADDR_TILEINFO* pTileInfo) const;
236 ADDR_TILEINFO* pTileInfo) const;
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Dsiaddrlib.h54 ADDR_TILEINFO info;
125 ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const;
130 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
147 ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
151 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
159 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const;
163 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const;
168 ADDR_TILEINFO* pTileInfo) const;
170 virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const;
187 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
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Dciaddrlib.h83 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo,
88 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
92 ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL
99 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
103 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type,
146 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel,
158 UINT_32 regValue, ADDR_TILEINFO* pCfg) const;
183 BOOL_32 CheckTcCompatibility(const ADDR_TILEINFO* pTileInfo, UINT_32 bpp, AddrTileMode tileMode,
202 ADDR_TILEINFO m_macroTileTable[MacroTileTableSize];
Degbaddrlib.cpp100 ADDR_TILEINFO tileInfoDef = {0}; in DispatchComputeSurfaceInfo()
101 ADDR_TILEINFO* pTileInfo = &tileInfoDef; in DispatchComputeSurfaceInfo()
141 memset(pTileInfo, 0, sizeof(ADDR_TILEINFO)); in DispatchComputeSurfaceInfo()
773 ADDR_TILEINFO* pTileInfo ///< [in,out] bank structure. in HwlReduceBankWidthHeight()
879 ADDR_TILEINFO* pTileInfo = pOut->pTileInfo; in ComputeSurfaceAlignmentsMacroTiled()
975 ADDR_TILEINFO* pTileInfo ///< [in] macro-tiled parameters in SanityCheckMacroTiled()
1089 ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure in ComputeSurfaceMipLevelTileMode()
1186 ADDR_TILEINFO tileInfo = *pIn->pTileInfo; in HwlGetAlignmentInfoMacroTiled()
1327 ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; in DispatchComputeSurfaceAddrFromCoord()
1453 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure in ComputeMacroTileEquation()
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Dciaddrlib.cpp507 const ADDR_TILEINFO* pInfo, ///< [in] Tile Info in HwlPostCheckTileIndex()
600 ADDR_TILEINFO* pInfo, ///< [out] Tile Info in HwlSetupTileCfg()
787 ADDR_TILEINFO tileInfo = {0}; in HwlComputeFmaskInfo()
957 ADDR_TILEINFO tileInfo = {0}; in HwlOptimizeTileMode()
1255 ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default in HwlSetupTileInfo()
1256 ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output in HwlSetupTileInfo()
1262 ADDR_TILEINFO* pTileInfo = pTileInfoOut; in HwlSetupTileInfo()
1486 ADDR_TILEINFO tileInfo = {0}; in HwlSetupTileInfo()
1733 ADDR_TILEINFO* pCfg ///< [out] output structure in ReadGbMacroTileCfg()
1816 ADDR_TILEINFO* pTileInfo, ///< [out] Pointer to ADDR_TILEINFO in HwlComputeMacroModeIndex()
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Dsiaddrlib.cpp141 const ADDR_TILEINFO* pTileInfo ///< [in] Tile info in HwlGetPipes()
220 ADDR_TILEINFO* pTileInfo, ///< [in] tile info in ComputeBankEquation()
449 ADDR_TILEINFO* pTileInfo, ///< [in] Tile info in ComputePipeEquation()
672 ADDR_TILEINFO* pTileInfo ///< [in] Tile info in ComputePipeFromCoord()
1227 ADDR_TILEINFO* pTileInfo ///< [in] tile info in HwlComputeTileDataWidthAndHeightLinear()
1300 ADDR_TILEINFO* pTileInfo, ///< [in] Tile info in HwlComputeXmaskAddrFromCoord()
1458 ADDR_TILEINFO* pTileInfo, ///< [in] Tile info in HwlComputeXmaskCoordFromAddr()
1954 ADDR_TILEINFO* pTileInfoIn, ///< [in] Tile info input: NULL for default in HwlSetupTileInfo()
1955 ADDR_TILEINFO* pTileInfoOut, ///< [out] Tile info output in HwlSetupTileInfo()
1961 ADDR_TILEINFO* pTileInfo = pTileInfoOut; in HwlSetupTileInfo()
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/external/mesa3d/src/amd/addrlib/src/core/
Daddrlib1.h227 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, ADDR_TILEINFO* pTileInfo,
237 BOOL_32 isTcCompatible, BOOL_32 isLinear, ADDR_TILEINFO* pTileInfo) const = 0;
319 ADDR_TILEINFO* pTileInfo,
328 ADDR_TILEINFO* pTileInfo, UINT_32* pPitchOut, UINT_32* pHeightOut, UINT_64* pCmaskBytes,
334 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
340 BOOL_32 isHeight8, ADDR_TILEINFO* pTileInfo,
346 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
377 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
383 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 mipLevel, in HwlPadDimensions()
427 const ADDR_TILEINFO* pTileInfo) const;
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Daddrlib1.cpp204 ADDR_TILEINFO tileInfoNull = {0}; in ComputeSurfaceInfo()
465 ADDR_TILEINFO tileInfoNull; in ComputeSurfaceAddrFromCoord()
545 ADDR_TILEINFO tileInfoNull; in ComputeSurfaceCoordFromAddr()
620 ADDR_TILEINFO tileInfoNull; in ComputeSliceTileSwizzle()
673 ADDR_TILEINFO tileInfoNull; in ExtractBankPipeSwizzle()
725 ADDR_TILEINFO tileInfoNull; in CombineBankPipeSwizzle()
779 ADDR_TILEINFO tileInfoNull; in ComputeBaseSwizzle()
844 ADDR_TILEINFO tileInfoNull; in ComputeFmaskInfo()
1022 ADDR_TILEINFO tileInfoNull; in ConvertTileInfoToHW()
1123 ADDR_TILEINFO tileInfo = {0}; in GetMacroModeIndex()
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/external/mesa3d/src/amd/addrlib/inc/
Daddrinterface.h459 } ADDR_TILEINFO; typedef
463 typedef ADDR_TILEINFO ADDR_R800_TILEINFO;
567 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Set to 0 to default/calculate
617 ADDR_TILEINFO* pTileInfo; ///< Tile parameters used. Filled in if 0 on input
706 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
794 ADDR_TILEINFO* pTileInfo; ///< 2D tile parameters. Client must provide all data
884 ADDR_TILEINFO* pTileInfo; ///< Tile info
958 ADDR_TILEINFO* pTileInfo; ///< Tile info
1021 ADDR_TILEINFO* pTileInfo; ///< Tile info
1102 ADDR_TILEINFO* pTileInfo; ///< Tile info
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/external/mesa3d/src/amd/common/
Dac_surface.c850 ADDR_TILEINFO AddrTileInfoIn = {0}; in gfx6_compute_surface()
851 ADDR_TILEINFO AddrTileInfoOut = {0}; in gfx6_compute_surface()
1121 ADDR_TILEINFO fmask_tile_info = {0}; in gfx6_compute_surface()