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Searched refs:AIPS1_BASE (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/imx/imx7/include/
Dimx_regs.h29 #define AIPS1_BASE 0x30000000 /* AIPS1 */ macro
57 #define CCM_BASE (AIPS1_BASE + 0x380000)
74 #define CSU_BASE (AIPS1_BASE + 0x3E0000)
77 #define MXC_IO_MUXC_BASE (AIPS1_BASE + 0x330000)
80 #define SNVS_BASE (AIPS1_BASE + 0x370000)
83 #define GPT1_BASE_ADDR (AIPS1_BASE + 0x2d0000)
86 #define USDHC1_BASE (AIPS1_BASE + 0xb40000)
87 #define USDHC2_BASE (AIPS1_BASE + 0xb50000)
88 #define USDHC3_BASE (AIPS1_BASE + 0xb60000)
100 #define WDOG1_BASE (AIPS1_BASE + 0x280000)
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/external/arm-trusted-firmware/plat/imx/common/
Dimx_aips.c50 (struct aipstz_regs *)(AIPS1_BASE + AIPSTZ_CONFIG_OFFSET), in imx_aips_init()