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Searched refs:ALIGN16 (Results 1 – 24 of 24) sorted by relevance

/external/mesa3d/src/mesa/math/
Dm_debug_util.h308 # define ALIGN16(type, array) type array __attribute__ ((aligned (16))) macro
310 # define ALIGN16(type, array) type array __declspec(align(16)) /* GH: Does this work? */ macro
312 # define ALIGN16(type, array) type __align (16) array macro
315 # define ALIGN16 macro
Dm_debug_xform.c163 ALIGN16(static GLfloat, s[TEST_COUNT][4]);
164 ALIGN16(static GLfloat, d[TEST_COUNT][4]);
165 ALIGN16(static GLfloat, r[TEST_COUNT][4]);
Dm_debug_clip.c206 ALIGN16(static GLfloat, s[TEST_COUNT][4]);
207 ALIGN16(static GLfloat, d[TEST_COUNT][4]);
208 ALIGN16(static GLfloat, r[TEST_COUNT][4]);
/external/mesa3d/src/gallium/auxiliary/util/
Du_threaded_context.h320 #define ALIGN16 __declspec(align(16)) macro
322 #define ALIGN16 __attribute__((aligned(16))) macro
326 struct ALIGN16 tc_call {
/external/libavc/test/encoder/
Dinput.c87 num_mbs = ALIGN16(ps_app_ctxt->u4_wd) * ALIGN16(ps_app_ctxt->u4_ht); in read_mb_info()
250 num_mbs = ALIGN16(ps_app_ctxt->u4_max_wd) * ALIGN16(ps_app_ctxt->u4_max_ht); in allocate_input()
Dapp.h54 #define ALIGN16(x) ((((x) + 15) >> 4) << 4) macro
/external/libmpeg2/decoder/
Dimpeg2d_deinterlace.c234 WORD32 wd = ALIGN16(ps_dec->u2_horizontal_size); in impeg2d_deinterlace()
235 WORD32 ht = ALIGN16(ps_dec->u2_vertical_size); in impeg2d_deinterlace()
Dimpeg2d_pic_proc.c302 ps_dec->u2_frame_height = ALIGN16(ps_dec->u2_vertical_size); in impeg2d_init_video_state()
303 ps_dec->u2_frame_width = ALIGN16(ps_dec->u2_horizontal_size); in impeg2d_init_video_state()
Dimpeg2d_api_main.c462 max_frm_width = ALIGN16(ps_ip->s_ivd_fill_mem_rec_ip_t.u4_max_frm_wd); in impeg2d_fill_mem_rec()
835 u4_stride = ALIGN16(u4_stride); in impeg2d_api_get_buf_info()
1294 buffer_wd = ALIGN16(disp_wd); in impeg2d_get_frame_dimensions()
1295 buffer_ht = ALIGN16(disp_ht); in impeg2d_get_frame_dimensions()
1624 i4_max_wd = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd); in impeg2d_api_init()
1625 i4_max_ht = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht); in impeg2d_api_init()
1840 u4_max_frm_width = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_wd); in impeg2d_api_init()
1841 u4_max_frm_height = ALIGN16(ps_dec_init_ip->s_ivd_init_ip_t.u4_frm_max_ht); in impeg2d_api_init()
/external/libmpeg2/common/
Dicv_macros.h63 #define ALIGN16(x) ((((x) + 15) >> 4) << 4) macro
Dimpeg2_macros.h49 #define ALIGN16(x) ((((x) + 15) >> 4) << 4) macro
/external/libhevc/common/
Dihevc_macros.h52 #define ALIGN16(x) ((((x) + 15) >> 4) << 4) macro
/external/libavc/common/
Dih264_macros.h48 #define ALIGN16(x) ((((x) + 15) >> 4) << 4) macro
/external/libavc/encoder/
Dih264e_api.c388 WORD32 max_wd = ALIGN16(ps_ip->s_ive_ip.u4_max_wd); in api_check_struct_sanity()
389 WORD32 max_ht = ALIGN16(ps_ip->s_ive_ip.u4_max_ht); in api_check_struct_sanity()
463 WORD32 max_wd = ALIGN16(ps_ip->s_ive_ip.u4_max_wd); in api_check_struct_sanity()
464 WORD32 max_ht = ALIGN16(ps_ip->s_ive_ip.u4_max_ht); in api_check_struct_sanity()
2366 UWORD32 wd_aln = ALIGN16(ps_cfg->u4_wd); in ih264e_codec_update_config()
2367 UWORD32 ht_aln = ALIGN16(ps_cfg->u4_ht); in ih264e_codec_update_config()
2382 ps_codec->i4_rec_strd = ALIGN16(ps_cfg->u4_wd) + PAD_WD; in ih264e_codec_update_config()
3264 max_ht_luma = ALIGN16(max_ht_luma); in ih264e_fill_num_mem_rec()
3265 max_wd_luma = ALIGN16(max_wd_luma); in ih264e_fill_num_mem_rec()
4127 max_ht_luma = ALIGN16(ps_ip->s_ive_ip.u4_max_ht); in ih264e_init_mem_rec()
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Dih264e_utils.c892 WORD32 num_luma_samples = ALIGN16(ps_codec->s_cfg.u4_wd) in ih264e_mv_buf_mgr_add_bufs()
893 * ALIGN16(ps_codec->s_cfg.u4_ht); in ih264e_mv_buf_mgr_add_bufs()
1357 ps_codec->i4_rec_strd = ALIGN16(ps_codec->s_cfg.u4_max_wd) + PAD_WD; in ih264e_codec_init()
/external/mesa3d/docs/relnotes/
D19.1.4.rst141 - intel/fs: Use ALIGN16 instructions for all derivatives on gen <= 7
D20.2.0.rst2563 - intel/eu: Set the right subnr for ALIGN16 destinations
/external/mesa3d/src/intel/tools/
Di965_gram.y407 %token ALIGN1 ALIGN16
538 case ALIGN16: in add_instruction_option()
2304 | ALIGN16 { $$ = ALIGN16; }
Di965_lex.l220 "align16" { return ALIGN16; }
/external/igt-gpu-tools/assembler/
Dlex.l385 "align16" { return ALIGN16; }
Dgram.y468 %token ALIGN1 ALIGN16 SECHALF COMPR SWITCH ATOMIC NODDCHK NODDCLR
585 case ALIGN16: in add_option()
2959 | ALIGN16 { $$ = ALIGN16; }
/external/libhevc/encoder/
Dihevce_enc_subpel_gen.c316 tot_wd = ALIGN16(tot_wd); in ihevce_pad_interp_recon_ctb()
/external/libavc/decoder/
Dih264d_api.c3697 buffer_wd = ALIGN16(disp_wd) + (PAD_LEN_Y_H << 1); in ih264d_get_frame_dimensions()
3698 buffer_ht = ALIGN16(disp_ht) + (PAD_LEN_Y_V << 2); in ih264d_get_frame_dimensions()
/external/libhevc/decoder/
Dihevcd_api.c3085 buffer_wd = ALIGN16(disp_wd) + PAD_WD; in ihevcd_get_frame_dimensions()
3086 buffer_ht = ALIGN16(disp_ht) + PAD_HT; in ihevcd_get_frame_dimensions()