1 /*
2 * Copyright 2012 Vadim Girlin <vadimgirlin@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Vadim Girlin
25 */
26
27 #ifndef R600_ISA_H_
28 #define R600_ISA_H_
29
30 #include "util/u_debug.h"
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36 /* ALU flags */
37 enum alu_op_flags
38 {
39 AF_NONE = 0,
40 AF_V = (1<<0), /* allowed in vector slots */
41
42 /* allowed in scalar(trans) slot (slots xyz on cayman, may be replicated
43 * to w) */
44 AF_S = (1<<1),
45
46 AF_4SLOT = (1<<2), /* uses four vector slots (e.g. DOT4) */
47 AF_4V = (AF_V | AF_4SLOT),
48 AF_VS = (AF_V | AF_S), /* allowed in any slot */
49
50 AF_KILL = (1<<4),
51 AF_PRED = (1<<5),
52 AF_SET = (1<<6),
53
54 /* e.g. MUL_PREV instructions, allowed in x/y, depends on z/w */
55 AF_PREV_INTERLEAVE = (1<<7),
56
57 AF_MOVA = (1<<8), /* all MOVA instructions */
58 AF_IEEE = (1<<10),
59
60 AF_DST_TYPE_MASK = (3<<11),
61 AF_FLOAT_DST = 0,
62 AF_INT_DST = (1<<11),
63 AF_UINT_DST = (3<<11),
64
65 /* DP instructions, 2-slot pairs */
66 AF_64 = (1<<13),
67 /* 24 bit instructions */
68 AF_24 = (1<<14),
69 /* DX10 variants */
70 AF_DX10 = (1<<15),
71
72 /* result is replicated to all channels (only if AF_4V is also set -
73 * for special handling of MULLO_INT on CM) */
74 AF_REPL = (1<<16),
75
76 /* interpolation instructions */
77 AF_INTERP = (1<<17),
78
79 /* LDS instructions */
80 AF_LDS = (1<<20),
81
82 /* e.g. DOT - depends on the next slot in the same group (x<=y/y<=z/z<=w) */
83 AF_PREV_NEXT = (1<<21),
84
85 /* int<->flt conversions */
86 AF_CVT = (1<<22),
87
88 /* commutative operation on src0 and src1 ( a op b = b op a),
89 * includes MULADDs (considering the MUL part on src0 and src1 only) */
90 AF_M_COMM = (1 << 23),
91
92 /* associative operation ((a op b) op c) == (a op (b op c)),
93 * includes MULADDs (considering the MUL part on src0 and src1 only) */
94 AF_M_ASSOC = (1 << 24),
95
96 AF_PRED_PUSH = (1 << 25),
97
98 AF_ANY_PRED = (AF_PRED | AF_PRED_PUSH),
99
100 AF_CMOV = (1 << 26),
101
102 // for SETcc, PREDSETcc, ... - type of comparison
103 AF_CMP_TYPE_MASK = (3 << 27),
104 AF_FLOAT_CMP = 0,
105 AF_INT_CMP = (1 << 27),
106 AF_UINT_CMP = (3 << 27),
107
108 /* condition codes - 3 bits */
109 AF_CC_SHIFT = 29,
110 AF_CC_MASK = (7U << AF_CC_SHIFT),
111 AF_CC_E = (0U << AF_CC_SHIFT),
112 AF_CC_GT = (1U << AF_CC_SHIFT),
113 AF_CC_GE = (2U << AF_CC_SHIFT),
114 AF_CC_NE = (3U << AF_CC_SHIFT),
115 AF_CC_LT = (4U << AF_CC_SHIFT),
116 AF_CC_LE = (5U << AF_CC_SHIFT),
117 };
118
119 /* flags for FETCH instructions (TEX/VTX/GDS) */
120 enum fetch_op_flags
121 {
122 FF_GDS = (1<<0),
123 FF_TEX = (1<<1),
124
125 FF_SETGRAD = (1<<2),
126 FF_GETGRAD = (1<<3),
127 FF_USEGRAD = (1<<4),
128
129 FF_VTX = (1<<5),
130 FF_MEM = (1<<6),
131
132 FF_SET_TEXTURE_OFFSETS = (1<<7),
133 FF_USE_TEXTURE_OFFSETS = (1<<8),
134 };
135
136 /* flags for CF instructions */
137 enum cf_op_flags
138 {
139 CF_CLAUSE = (1<<0), /* execute clause (alu/fetch ...) */
140 CF_ACK = (1<<1), /* acked versions of some instructions */
141 CF_ALU = (1<<2), /* alu clause execution */
142 CF_ALU_EXT = (1<<3), /* ALU_EXTENDED */
143 CF_EXP = (1<<4), /* export (CF_ALLOC_EXPORT_WORD1_SWIZ) */
144 CF_BRANCH = (1<<5), /* branch instructions */
145 CF_LOOP = (1<<6), /* loop instructions */
146 CF_CALL = (1<<7), /* call instructions */
147 CF_MEM = (1<<8), /* export_mem (CF_ALLOC_EXPORT_WORD1_BUF) */
148 CF_FETCH = (1<<9), /* fetch clause */
149
150 CF_UNCOND = (1<<10), /* COND = ACTIVE required */
151 CF_EMIT = (1<<11),
152 CF_STRM = (1<<12), /* MEM_STREAM* */
153
154 CF_RAT = (1<<13), /* MEM_RAT* */
155
156 CF_LOOP_START = (1<<14)
157 };
158
159 /* ALU instruction info */
160 struct alu_op_info
161 {
162 /* instruction name */
163 const char *name;
164 /* number of source operands */
165 int src_count;
166 /* opcodes, [0] - for r6xx/r7xx, [1] - for evergreen/cayman
167 * (-1) if instruction doesn't exist (more precise info in "slots") */
168 int opcode[2];
169 /* slots for r6xx, r7xx, evergreen, cayman
170 * (0 if instruction doesn't exist for chip class) */
171 int slots[4];
172 /* flags (mostly autogenerated from instruction name) */
173 unsigned int flags;
174 };
175
176 /* FETCH instruction info */
177 struct fetch_op_info
178 {
179 const char * name;
180 /* for every chip class */
181 int opcode[4];
182 int flags;
183 };
184
185 /* CF instruction info */
186 struct cf_op_info
187 {
188 const char * name;
189 /* for every chip class */
190 int opcode[4];
191 int flags;
192 };
193
194
195 #define ALU_OP2_ADD 0
196 #define ALU_OP2_MUL 1
197 #define ALU_OP2_MUL_IEEE 2
198 #define ALU_OP2_MAX 3
199 #define ALU_OP2_MIN 4
200 #define ALU_OP2_MAX_DX10 5
201 #define ALU_OP2_MIN_DX10 6
202 #define ALU_OP2_SETE 7
203 #define ALU_OP2_SETGT 8
204 #define ALU_OP2_SETGE 9
205 #define ALU_OP2_SETNE 10
206 #define ALU_OP2_SETE_DX10 11
207 #define ALU_OP2_SETGT_DX10 12
208 #define ALU_OP2_SETGE_DX10 13
209 #define ALU_OP2_SETNE_DX10 14
210 #define ALU_OP1_FRACT 15
211 #define ALU_OP1_TRUNC 16
212 #define ALU_OP1_CEIL 17
213 #define ALU_OP1_RNDNE 18
214 #define ALU_OP1_FLOOR 19
215 #define ALU_OP2_ASHR_INT 20
216 #define ALU_OP2_LSHR_INT 21
217 #define ALU_OP2_LSHL_INT 22
218 #define ALU_OP1_MOV 23
219 #define ALU_OP0_NOP 24
220 #define ALU_OP2_PRED_SETGT_UINT 25
221 #define ALU_OP2_PRED_SETGE_UINT 26
222 #define ALU_OP2_PRED_SETE 27
223 #define ALU_OP2_PRED_SETGT 28
224 #define ALU_OP2_PRED_SETGE 29
225 #define ALU_OP2_PRED_SETNE 30
226 #define ALU_OP1_PRED_SET_INV 31
227 #define ALU_OP2_PRED_SET_POP 32
228 #define ALU_OP0_PRED_SET_CLR 33
229 #define ALU_OP1_PRED_SET_RESTORE 34
230 #define ALU_OP2_PRED_SETE_PUSH 35
231 #define ALU_OP2_PRED_SETGT_PUSH 36
232 #define ALU_OP2_PRED_SETGE_PUSH 37
233 #define ALU_OP2_PRED_SETNE_PUSH 38
234 #define ALU_OP2_KILLE 39
235 #define ALU_OP2_KILLGT 40
236 #define ALU_OP2_KILLGE 41
237 #define ALU_OP2_KILLNE 42
238 #define ALU_OP2_AND_INT 43
239 #define ALU_OP2_OR_INT 44
240 #define ALU_OP2_XOR_INT 45
241 #define ALU_OP1_NOT_INT 46
242 #define ALU_OP2_ADD_INT 47
243 #define ALU_OP2_SUB_INT 48
244 #define ALU_OP2_MAX_INT 49
245 #define ALU_OP2_MIN_INT 50
246 #define ALU_OP2_MAX_UINT 51
247 #define ALU_OP2_MIN_UINT 52
248 #define ALU_OP2_SETE_INT 53
249 #define ALU_OP2_SETGT_INT 54
250 #define ALU_OP2_SETGE_INT 55
251 #define ALU_OP2_SETNE_INT 56
252 #define ALU_OP2_SETGT_UINT 57
253 #define ALU_OP2_SETGE_UINT 58
254 #define ALU_OP2_KILLGT_UINT 59
255 #define ALU_OP2_KILLGE_UINT 60
256 #define ALU_OP2_PRED_SETE_INT 61
257 #define ALU_OP2_PRED_SETGT_INT 62
258 #define ALU_OP2_PRED_SETGE_INT 63
259 #define ALU_OP2_PRED_SETNE_INT 64
260 #define ALU_OP2_KILLE_INT 65
261 #define ALU_OP2_KILLGT_INT 66
262 #define ALU_OP2_KILLGE_INT 67
263 #define ALU_OP2_KILLNE_INT 68
264 #define ALU_OP2_PRED_SETE_PUSH_INT 69
265 #define ALU_OP2_PRED_SETGT_PUSH_INT 70
266 #define ALU_OP2_PRED_SETGE_PUSH_INT 71
267 #define ALU_OP2_PRED_SETNE_PUSH_INT 72
268 #define ALU_OP2_PRED_SETLT_PUSH_INT 73
269 #define ALU_OP2_PRED_SETLE_PUSH_INT 74
270 #define ALU_OP1_FLT_TO_INT 75
271 #define ALU_OP1_BFREV_INT 76
272 #define ALU_OP2_ADDC_UINT 77
273 #define ALU_OP2_SUBB_UINT 78
274 #define ALU_OP0_GROUP_BARRIER 79
275 #define ALU_OP0_GROUP_SEQ_BEGIN 80
276 #define ALU_OP0_GROUP_SEQ_END 81
277 #define ALU_OP2_SET_MODE 82
278 #define ALU_OP0_SET_CF_IDX0 83
279 #define ALU_OP0_SET_CF_IDX1 84
280 #define ALU_OP2_SET_LDS_SIZE 85
281 #define ALU_OP2_MUL_INT24 86
282 #define ALU_OP2_MULHI_INT24 87
283 #define ALU_OP1_FLT_TO_INT_TRUNC 88
284 #define ALU_OP1_EXP_IEEE 89
285 #define ALU_OP1_LOG_CLAMPED 90
286 #define ALU_OP1_LOG_IEEE 91
287 #define ALU_OP1_RECIP_CLAMPED 92
288 #define ALU_OP1_RECIP_FF 93
289 #define ALU_OP1_RECIP_IEEE 94
290 #define ALU_OP1_RECIPSQRT_CLAMPED 95
291 #define ALU_OP1_RECIPSQRT_FF 96
292 #define ALU_OP1_RECIPSQRT_IEEE 97
293 #define ALU_OP1_SQRT_IEEE 98
294 #define ALU_OP1_SIN 99
295 #define ALU_OP1_COS 100
296 #define ALU_OP2_MULLO_INT 101
297 #define ALU_OP2_MULHI_INT 102
298 #define ALU_OP2_MULLO_UINT 103
299 #define ALU_OP2_MULHI_UINT 104
300 #define ALU_OP1_RECIP_INT 105
301 #define ALU_OP1_RECIP_UINT 106
302 #define ALU_OP2_RECIP_64 107
303 #define ALU_OP2_RECIP_CLAMPED_64 108
304 #define ALU_OP2_RECIPSQRT_64 109
305 #define ALU_OP2_RECIPSQRT_CLAMPED_64 110
306 #define ALU_OP2_SQRT_64 111
307 #define ALU_OP1_FLT_TO_UINT 112
308 #define ALU_OP1_INT_TO_FLT 113
309 #define ALU_OP1_UINT_TO_FLT 114
310 #define ALU_OP2_BFM_INT 115
311 #define ALU_OP1_FLT32_TO_FLT16 116
312 #define ALU_OP1_FLT16_TO_FLT32 117
313 #define ALU_OP1_UBYTE0_FLT 118
314 #define ALU_OP1_UBYTE1_FLT 119
315 #define ALU_OP1_UBYTE2_FLT 120
316 #define ALU_OP1_UBYTE3_FLT 121
317 #define ALU_OP1_BCNT_INT 122
318 #define ALU_OP1_FFBH_UINT 123
319 #define ALU_OP1_FFBL_INT 124
320 #define ALU_OP1_FFBH_INT 125
321 #define ALU_OP1_FLT_TO_UINT4 126
322 #define ALU_OP2_DOT_IEEE 127
323 #define ALU_OP1_FLT_TO_INT_RPI 128
324 #define ALU_OP1_FLT_TO_INT_FLOOR 129
325 #define ALU_OP2_MULHI_UINT24 130
326 #define ALU_OP1_MBCNT_32HI_INT 131
327 #define ALU_OP1_OFFSET_TO_FLT 132
328 #define ALU_OP2_MUL_UINT24 133
329 #define ALU_OP1_BCNT_ACCUM_PREV_INT 134
330 #define ALU_OP1_MBCNT_32LO_ACCUM_PREV_INT 135
331 #define ALU_OP2_SETE_64 136
332 #define ALU_OP2_SETNE_64 137
333 #define ALU_OP2_SETGT_64 138
334 #define ALU_OP2_SETGE_64 139
335 #define ALU_OP2_MIN_64 140
336 #define ALU_OP2_MAX_64 141
337 #define ALU_OP2_DOT4 142
338 #define ALU_OP2_DOT4_IEEE 143
339 #define ALU_OP2_CUBE 144
340 #define ALU_OP1_MAX4 145
341 #define ALU_OP1_FREXP_64 146
342 #define ALU_OP2_LDEXP_64 147
343 #define ALU_OP1_FRACT_64 148
344 #define ALU_OP2_PRED_SETGT_64 149
345 #define ALU_OP2_PRED_SETE_64 150
346 #define ALU_OP2_PRED_SETGE_64 151
347 #define ALU_OP2_MUL_64 152
348 #define ALU_OP2_ADD_64 153
349 #define ALU_OP1_MOVA_INT 154
350 #define ALU_OP1_FLT64_TO_FLT32 155
351 #define ALU_OP1_FLT32_TO_FLT64 156
352 #define ALU_OP2_SAD_ACCUM_PREV_UINT 157
353 #define ALU_OP2_DOT 158
354 #define ALU_OP1_MUL_PREV 159
355 #define ALU_OP1_MUL_IEEE_PREV 160
356 #define ALU_OP1_ADD_PREV 161
357 #define ALU_OP2_MULADD_PREV 162
358 #define ALU_OP2_MULADD_IEEE_PREV 163
359 #define ALU_OP2_INTERP_XY 164
360 #define ALU_OP2_INTERP_ZW 165
361 #define ALU_OP2_INTERP_X 166
362 #define ALU_OP2_INTERP_Z 167
363 #define ALU_OP1_STORE_FLAGS 168
364 #define ALU_OP1_LOAD_STORE_FLAGS 169
365 #define ALU_OP2_LDS_1A 170
366 #define ALU_OP2_LDS_1A1D 171
367 #define ALU_OP2_LDS_2A 172
368 #define ALU_OP1_INTERP_LOAD_P0 173
369 #define ALU_OP1_INTERP_LOAD_P10 174
370 #define ALU_OP1_INTERP_LOAD_P20 175
371 #define ALU_OP3_BFE_UINT 176
372 #define ALU_OP3_BFE_INT 177
373 #define ALU_OP3_BFI_INT 178
374 #define ALU_OP3_FMA 179
375 #define ALU_OP3_MULADD_INT24 180
376 #define ALU_OP3_CNDNE_64 181
377 #define ALU_OP3_FMA_64 182
378 #define ALU_OP3_LERP_UINT 183
379 #define ALU_OP3_BIT_ALIGN_INT 184
380 #define ALU_OP3_BYTE_ALIGN_INT 185
381 #define ALU_OP3_SAD_ACCUM_UINT 186
382 #define ALU_OP3_SAD_ACCUM_HI_UINT 187
383 #define ALU_OP3_MULADD_UINT24 188
384 #define ALU_OP3_LDS_IDX_OP 189
385 #define ALU_OP3_MULADD 190
386 #define ALU_OP3_MULADD_M2 191
387 #define ALU_OP3_MULADD_M4 192
388 #define ALU_OP3_MULADD_D2 193
389 #define ALU_OP3_MULADD_IEEE 194
390 #define ALU_OP3_CNDE 195
391 #define ALU_OP3_CNDGT 196
392 #define ALU_OP3_CNDGE 197
393 #define ALU_OP3_CNDE_INT 198
394 #define ALU_OP3_CNDGT_INT 199
395 #define ALU_OP3_CNDGE_INT 200
396 #define ALU_OP3_MUL_LIT 201
397 #define ALU_OP1_MOVA 202
398 #define ALU_OP1_MOVA_FLOOR 203
399 #define ALU_OP1_MOVA_GPR_INT 204
400 #define ALU_OP3_MULADD_64 205
401 #define ALU_OP3_MULADD_64_M2 206
402 #define ALU_OP3_MULADD_64_M4 207
403 #define ALU_OP3_MULADD_64_D2 208
404 #define ALU_OP3_MUL_LIT_M2 209
405 #define ALU_OP3_MUL_LIT_M4 210
406 #define ALU_OP3_MUL_LIT_D2 211
407 #define ALU_OP3_MULADD_IEEE_M2 212
408 #define ALU_OP3_MULADD_IEEE_M4 213
409 #define ALU_OP3_MULADD_IEEE_D2 214
410
411 #define LDS_OP2_LDS_ADD 215
412 #define LDS_OP2_LDS_SUB 216
413 #define LDS_OP2_LDS_RSUB 217
414 #define LDS_OP2_LDS_INC 218
415 #define LDS_OP2_LDS_DEC 219
416 #define LDS_OP2_LDS_MIN_INT 220
417 #define LDS_OP2_LDS_MAX_INT 221
418 #define LDS_OP2_LDS_MIN_UINT 222
419 #define LDS_OP2_LDS_MAX_UINT 223
420 #define LDS_OP2_LDS_AND 224
421 #define LDS_OP2_LDS_OR 225
422 #define LDS_OP2_LDS_XOR 226
423 #define LDS_OP3_LDS_MSKOR 227
424 #define LDS_OP2_LDS_WRITE 228
425 #define LDS_OP3_LDS_WRITE_REL 229
426 #define LDS_OP3_LDS_WRITE2 230
427 #define LDS_OP3_LDS_CMP_STORE 231
428 #define LDS_OP3_LDS_CMP_STORE_SPF 232
429 #define LDS_OP2_LDS_BYTE_WRITE 233
430 #define LDS_OP2_LDS_SHORT_WRITE 234
431 #define LDS_OP2_LDS_ADD_RET 235
432 #define LDS_OP2_LDS_SUB_RET 236
433 #define LDS_OP2_LDS_RSUB_RET 237
434 #define LDS_OP2_LDS_INC_RET 238
435 #define LDS_OP2_LDS_DEC_RET 239
436 #define LDS_OP2_LDS_MIN_INT_RET 240
437 #define LDS_OP2_LDS_MAX_INT_RET 241
438 #define LDS_OP2_LDS_MIN_UINT_RET 242
439 #define LDS_OP2_LDS_MAX_UINT_RET 243
440 #define LDS_OP2_LDS_AND_RET 244
441 #define LDS_OP2_LDS_OR_RET 245
442 #define LDS_OP2_LDS_XOR_RET 246
443 #define LDS_OP3_LDS_MSKOR_RET 247
444 #define LDS_OP2_LDS_XCHG_RET 248
445 #define LDS_OP3_LDS_XCHG_REL_RET 249
446 #define LDS_OP3_LDS_XCHG2_RET 250
447 #define LDS_OP3_LDS_CMP_XCHG_RET 251
448 #define LDS_OP3_LDS_CMP_XCHG_SPF_RET 252
449 #define LDS_OP1_LDS_READ_RET 253
450 #define LDS_OP1_LDS_READ_REL_RET 254
451 #define LDS_OP2_LDS_READ2_RET 255
452 #define LDS_OP3_LDS_READWRITE_RET 256
453 #define LDS_OP1_LDS_BYTE_READ_RET 257
454 #define LDS_OP1_LDS_UBYTE_READ_RET 258
455 #define LDS_OP1_LDS_SHORT_READ_RET 259
456 #define LDS_OP1_LDS_USHORT_READ_RET 260
457
458 #define FETCH_OP_VFETCH 0
459 #define FETCH_OP_SEMFETCH 1
460 #define FETCH_OP_READ_SCRATCH 2
461 #define FETCH_OP_READ_REDUCT 3
462 #define FETCH_OP_READ_MEM 4
463 #define FETCH_OP_DS_LOCAL_WRITE 5
464 #define FETCH_OP_DS_LOCAL_READ 6
465 #define FETCH_OP_GDS_ADD 7
466 #define FETCH_OP_GDS_SUB 8
467 #define FETCH_OP_GDS_RSUB 9
468 #define FETCH_OP_GDS_INC 10
469 #define FETCH_OP_GDS_DEC 11
470 #define FETCH_OP_GDS_MIN_INT 12
471 #define FETCH_OP_GDS_MAX_INT 13
472 #define FETCH_OP_GDS_MIN_UINT 14
473 #define FETCH_OP_GDS_MAX_UINT 15
474 #define FETCH_OP_GDS_AND 16
475 #define FETCH_OP_GDS_OR 17
476 #define FETCH_OP_GDS_XOR 18
477 #define FETCH_OP_GDS_MSKOR 19
478 #define FETCH_OP_GDS_WRITE 20
479 #define FETCH_OP_GDS_WRITE_REL 21
480 #define FETCH_OP_GDS_WRITE2 22
481 #define FETCH_OP_GDS_CMP_STORE 23
482 #define FETCH_OP_GDS_CMP_STORE_SPF 24
483 #define FETCH_OP_GDS_BYTE_WRITE 25
484 #define FETCH_OP_GDS_SHORT_WRITE 26
485 #define FETCH_OP_GDS_ADD_RET 27
486 #define FETCH_OP_GDS_SUB_RET 28
487 #define FETCH_OP_GDS_RSUB_RET 29
488 #define FETCH_OP_GDS_INC_RET 30
489 #define FETCH_OP_GDS_DEC_RET 31
490 #define FETCH_OP_GDS_MIN_INT_RET 32
491 #define FETCH_OP_GDS_MAX_INT_RET 33
492 #define FETCH_OP_GDS_MIN_UINT_RET 34
493 #define FETCH_OP_GDS_MAX_UINT_RET 35
494 #define FETCH_OP_GDS_AND_RET 36
495 #define FETCH_OP_GDS_OR_RET 37
496 #define FETCH_OP_GDS_XOR_RET 38
497 #define FETCH_OP_GDS_MSKOR_RET 39
498 #define FETCH_OP_GDS_XCHG_RET 40
499 #define FETCH_OP_GDS_XCHG_REL_RET 41
500 #define FETCH_OP_GDS_XCHG2_RET 42
501 #define FETCH_OP_GDS_CMP_XCHG_RET 43
502 #define FETCH_OP_GDS_CMP_XCHG_SPF_RET 44
503 #define FETCH_OP_GDS_READ_RET 45
504 #define FETCH_OP_GDS_READ_REL_RET 46
505 #define FETCH_OP_GDS_READ2_RET 47
506 #define FETCH_OP_GDS_READWRITE_RET 48
507 #define FETCH_OP_GDS_BYTE_READ_RET 49
508 #define FETCH_OP_GDS_UBYTE_READ_RET 50
509 #define FETCH_OP_GDS_SHORT_READ_RET 51
510 #define FETCH_OP_GDS_USHORT_READ_RET 52
511 #define FETCH_OP_GDS_ATOMIC_ORDERED_ALLOC 53
512 #define FETCH_OP_TF_WRITE 54
513 #define FETCH_OP_DS_GLOBAL_WRITE 55
514 #define FETCH_OP_DS_GLOBAL_READ 56
515 #define FETCH_OP_LD 57
516 #define FETCH_OP_LDFPTR 58
517 #define FETCH_OP_GET_TEXTURE_RESINFO 59
518 #define FETCH_OP_GET_NUMBER_OF_SAMPLES 60
519 #define FETCH_OP_GET_LOD 61
520 #define FETCH_OP_GET_GRADIENTS_H 62
521 #define FETCH_OP_GET_GRADIENTS_V 63
522 #define FETCH_OP_GET_GRADIENTS_H_FINE 64
523 #define FETCH_OP_GET_GRADIENTS_V_FINE 65
524 #define FETCH_OP_GET_LERP 66
525 #define FETCH_OP_SET_TEXTURE_OFFSETS 67
526 #define FETCH_OP_KEEP_GRADIENTS 68
527 #define FETCH_OP_SET_GRADIENTS_H 69
528 #define FETCH_OP_SET_GRADIENTS_V 70
529 #define FETCH_OP_SET_GRADIENTS_H_COARSE 71
530 #define FETCH_OP_SET_GRADIENTS_V_COARSE 72
531 #define FETCH_OP_SET_GRADIENTS_H_PACKED_FINE 73
532 #define FETCH_OP_SET_GRADIENTS_V_PACKED_FINE 74
533 #define FETCH_OP_SET_GRADIENTS_H_PACKED_COARSE 75
534 #define FETCH_OP_SET_GRADIENTS_V_PACKED_COARSE 76
535 #define FETCH_OP_PASS 77
536 #define FETCH_OP_PASS1 78
537 #define FETCH_OP_PASS2 79
538 #define FETCH_OP_PASS3 80
539 #define FETCH_OP_SET_CUBEMAP_INDEX 81
540 #define FETCH_OP_GET_BUFFER_RESINFO 82
541 #define FETCH_OP_FETCH4 83
542 #define FETCH_OP_SAMPLE 84
543 #define FETCH_OP_SAMPLE_L 85
544 #define FETCH_OP_SAMPLE_LB 86
545 #define FETCH_OP_SAMPLE_LZ 87
546 #define FETCH_OP_SAMPLE_G 88
547 #define FETCH_OP_SAMPLE_G_L 89
548 #define FETCH_OP_GATHER4 90
549 #define FETCH_OP_SAMPLE_G_LB 91
550 #define FETCH_OP_SAMPLE_G_LZ 92
551 #define FETCH_OP_GATHER4_O 93
552 #define FETCH_OP_SAMPLE_C 94
553 #define FETCH_OP_SAMPLE_C_L 95
554 #define FETCH_OP_SAMPLE_C_LB 96
555 #define FETCH_OP_SAMPLE_C_LZ 97
556 #define FETCH_OP_SAMPLE_C_G 98
557 #define FETCH_OP_SAMPLE_C_G_L 99
558 #define FETCH_OP_GATHER4_C 100
559 #define FETCH_OP_SAMPLE_C_G_LB 101
560 #define FETCH_OP_SAMPLE_C_G_LZ 102
561 #define FETCH_OP_GATHER4_C_O 103
562
563 #define CF_OP_NOP 0
564 #define CF_OP_TEX 1
565 #define CF_OP_VTX 2
566 #define CF_OP_VTX_TC 3
567 #define CF_OP_GDS 4
568 #define CF_OP_LOOP_START 5
569 #define CF_OP_LOOP_END 6
570 #define CF_OP_LOOP_START_DX10 7
571 #define CF_OP_LOOP_START_NO_AL 8
572 #define CF_OP_LOOP_CONTINUE 9
573 #define CF_OP_LOOP_BREAK 10
574 #define CF_OP_JUMP 11
575 #define CF_OP_PUSH 12
576 #define CF_OP_PUSH_ELSE 13
577 #define CF_OP_ELSE 14
578 #define CF_OP_POP 15
579 #define CF_OP_POP_JUMP 16
580 #define CF_OP_POP_PUSH 17
581 #define CF_OP_POP_PUSH_ELSE 18
582 #define CF_OP_CALL 19
583 #define CF_OP_CALL_FS 20
584 #define CF_OP_RET 21
585 #define CF_OP_EMIT_VERTEX 22
586 #define CF_OP_EMIT_CUT_VERTEX 23
587 #define CF_OP_CUT_VERTEX 24
588 #define CF_OP_KILL 25
589 #define CF_OP_END_PROGRAM 26
590 #define CF_OP_WAIT_ACK 27
591 #define CF_OP_TEX_ACK 28
592 #define CF_OP_VTX_ACK 29
593 #define CF_OP_VTX_TC_ACK 30
594 #define CF_OP_JUMPTABLE 31
595 #define CF_OP_WAVE_SYNC 32
596 #define CF_OP_HALT 33
597 #define CF_OP_CF_END 34
598 #define CF_OP_LDS_DEALLOC 35
599 #define CF_OP_PUSH_WQM 36
600 #define CF_OP_POP_WQM 37
601 #define CF_OP_ELSE_WQM 38
602 #define CF_OP_JUMP_ANY 39
603 #define CF_OP_REACTIVATE 40
604 #define CF_OP_REACTIVATE_WQM 41
605 #define CF_OP_INTERRUPT 42
606 #define CF_OP_INTERRUPT_AND_SLEEP 43
607 #define CF_OP_SET_PRIORITY 44
608 #define CF_OP_MEM_STREAM0_BUF0 45
609 #define CF_OP_MEM_STREAM0_BUF1 46
610 #define CF_OP_MEM_STREAM0_BUF2 47
611 #define CF_OP_MEM_STREAM0_BUF3 48
612 #define CF_OP_MEM_STREAM1_BUF0 49
613 #define CF_OP_MEM_STREAM1_BUF1 50
614 #define CF_OP_MEM_STREAM1_BUF2 51
615 #define CF_OP_MEM_STREAM1_BUF3 52
616 #define CF_OP_MEM_STREAM2_BUF0 53
617 #define CF_OP_MEM_STREAM2_BUF1 54
618 #define CF_OP_MEM_STREAM2_BUF2 55
619 #define CF_OP_MEM_STREAM2_BUF3 56
620 #define CF_OP_MEM_STREAM3_BUF0 57
621 #define CF_OP_MEM_STREAM3_BUF1 58
622 #define CF_OP_MEM_STREAM3_BUF2 59
623 #define CF_OP_MEM_STREAM3_BUF3 60
624 #define CF_OP_MEM_STREAM0 61
625 #define CF_OP_MEM_STREAM1 62
626 #define CF_OP_MEM_STREAM2 63
627 #define CF_OP_MEM_STREAM3 64
628 #define CF_OP_MEM_SCRATCH 65
629 #define CF_OP_MEM_REDUCT 66
630 #define CF_OP_MEM_RING 67
631 #define CF_OP_EXPORT 68
632 #define CF_OP_EXPORT_DONE 69
633 #define CF_OP_MEM_EXPORT 70
634 #define CF_OP_MEM_RAT 71
635 #define CF_OP_MEM_RAT_NOCACHE 72
636 #define CF_OP_MEM_RING1 73
637 #define CF_OP_MEM_RING2 74
638 #define CF_OP_MEM_RING3 75
639 #define CF_OP_MEM_MEM_COMBINED 76
640 #define CF_OP_MEM_RAT_COMBINED_NOCACHE 77
641 #define CF_OP_MEM_RAT_COMBINED 78
642 #define CF_OP_EXPORT_DONE_END 79
643 #define CF_OP_ALU 80
644 #define CF_OP_ALU_PUSH_BEFORE 81
645 #define CF_OP_ALU_POP_AFTER 82
646 #define CF_OP_ALU_POP2_AFTER 83
647 #define CF_OP_ALU_EXT 84
648 #define CF_OP_ALU_CONTINUE 85
649 #define CF_OP_ALU_BREAK 86
650 #define CF_OP_ALU_VALID_PIXEL_MODE 87
651 #define CF_OP_ALU_ELSE_AFTER 88
652
653 /* CF_NATIVE means that r600_bytecode_cf contains pre-encoded native data */
654 #define CF_NATIVE 89
655
656 enum r600_chip_class {
657 ISA_CC_R600,
658 ISA_CC_R700,
659 ISA_CC_EVERGREEN,
660 ISA_CC_CAYMAN
661 };
662
663 struct r600_isa {
664 enum r600_chip_class hw_class;
665
666 /* these arrays provide reverse mapping - opcode => table_index,
667 * typically we don't need such lookup, unless we are decoding the native
668 * bytecode (e.g. when reading the bytestream from llvm backend) */
669 unsigned *alu_op2_map;
670 unsigned *alu_op3_map;
671 unsigned *fetch_map;
672 unsigned *cf_map;
673 };
674
675 struct r600_context;
676
677 int r600_isa_init(struct r600_context *ctx, struct r600_isa *isa);
678 int r600_isa_destroy(struct r600_isa *isa);
679
680 extern const struct alu_op_info r600_alu_op_table[];
681
682 unsigned
683 r600_alu_op_table_size(void);
684
685 const struct alu_op_info *
686 r600_isa_alu(unsigned op);
687
688 const struct fetch_op_info *
689 r600_isa_fetch(unsigned op);
690
691 const struct cf_op_info *
692 r600_isa_cf(unsigned op);
693
694 static inline unsigned
r600_isa_alu_opcode(enum r600_chip_class chip_class,unsigned op)695 r600_isa_alu_opcode(enum r600_chip_class chip_class, unsigned op) {
696 int opc = r600_isa_alu(op)->opcode[chip_class >> 1];
697 assert(opc != -1);
698 return opc;
699 }
700
701 static inline unsigned
r600_isa_alu_slots(enum r600_chip_class chip_class,unsigned op)702 r600_isa_alu_slots(enum r600_chip_class chip_class, unsigned op) {
703 unsigned slots = r600_isa_alu(op)->slots[chip_class];
704 assert(slots != 0);
705 return slots;
706 }
707
708 static inline unsigned
r600_isa_fetch_opcode(enum r600_chip_class chip_class,unsigned op)709 r600_isa_fetch_opcode(enum r600_chip_class chip_class, unsigned op) {
710 int opc = r600_isa_fetch(op)->opcode[chip_class];
711 assert(opc != -1);
712 return opc;
713 }
714
715 static inline unsigned
r600_isa_cf_opcode(enum r600_chip_class chip_class,unsigned op)716 r600_isa_cf_opcode(enum r600_chip_class chip_class, unsigned op) {
717 int opc = r600_isa_cf(op)->opcode[chip_class];
718 assert(opc != -1);
719 return opc;
720 }
721
722 static inline unsigned
r600_isa_alu_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_op3)723 r600_isa_alu_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_op3) {
724 unsigned op;
725 if (is_op3) {
726 assert(isa->alu_op3_map);
727 op = isa->alu_op3_map[opcode];
728 } else {
729 assert(isa->alu_op2_map);
730 op = isa->alu_op2_map[opcode];
731 }
732 assert(op);
733 return op - 1;
734 }
735
736 static inline unsigned
r600_isa_fetch_by_opcode(struct r600_isa * isa,unsigned opcode)737 r600_isa_fetch_by_opcode(struct r600_isa* isa, unsigned opcode) {
738 unsigned op;
739 assert(isa->fetch_map);
740 op = isa->fetch_map[opcode];
741 assert(op);
742 return op - 1;
743 }
744
745 static inline unsigned
r600_isa_cf_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_alu)746 r600_isa_cf_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_alu) {
747 unsigned op;
748 assert(isa->cf_map);
749 /* using offset for CF_ALU_xxx opcodes because they overlap with other
750 * CF opcodes (they use different encoding in hw) */
751 op = isa->cf_map[is_alu ? opcode + 0x80 : opcode];
752 assert(op);
753 return op - 1;
754 }
755
756 #ifdef __cplusplus
757 } /* extern "C" */
758 #endif
759
760 #endif /* R600_ISA_H_ */
761