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Searched refs:AMCNTENSET0_EL0 (Results 1 – 7 of 7) sorted by relevance

/external/llvm-project/llvm/test/MC/AArch64/
Darmv8.4a-actmon.s14 msr AMCNTENSET0_EL0, x0
63 mrs x0, AMCNTENSET0_EL0
/external/llvm-project/llvm/test/MC/Disassembler/AArch64/
Darmv8.4a-actmon.txt99 #CHECK: msr AMCNTENSET0_EL0, x0
144 #CHECK: mrs x0, AMCNTENSET0_EL0
/external/arm-trusted-firmware/include/arch/aarch64/
Darch_helpers.h489 DEFINE_RENAME_SYSREG_RW_FUNCS(amcntenset0_el0, AMCNTENSET0_EL0) in DEFINE_SYSREG_READ_FUNC()
Darch.h923 #define AMCNTENSET0_EL0 S3_3_C13_C2_5 macro
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc884 AMCNTENSET0_EL0 = 56981,
2948 { "AMCNTENSET0_EL0", 0xDE95, true, true, {AArch64::FeatureAM} }, // 694
3051 { "AMCNTENSET0_EL0", 694 },
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td1371 def : RWSysReg<"AMCNTENSET0_EL0", 0b11, 0b011, 0b1101, 0b0010, 0b101>;
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td1373 def : RWSysReg<"AMCNTENSET0_EL0", 0b11, 0b011, 0b1101, 0b0010, 0b101>;