Searched refs:AMEVCNTR10_EL0 (Results 1 – 7 of 7) sorted by relevance
| /external/arm-trusted-firmware/lib/extensions/amu/aarch64/ |
| D | amu_helpers.S | 106 1: read AMEVCNTR10_EL0 /* index 0 */
149 1: write AMEVCNTR10_EL0 /* index 0 */
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.4a-actmon.s | 25 msr AMEVCNTR10_EL0, x0
74 mrs x0, AMEVCNTR10_EL0
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-actmon.txt | 106 #CHECK: msr AMEVCNTR10_EL0, x0
155 #CHECK: mrs x0, AMEVCNTR10_EL0
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | arch.h | 940 #define AMEVCNTR10_EL0 S3_3_C13_C12_0 macro
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 895 AMEVCNTR10_EL0 = 57056,
2959 { "AMEVCNTR10_EL0", 0xDEE0, true, true, {AArch64::FeatureAM} }, // 705
3058 { "AMEVCNTR10_EL0", 705 },
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1382 def : RWSysReg<"AMEVCNTR10_EL0", 0b11, 0b011, 0b1101, 0b1100, 0b000>;
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1384 def : RWSysReg<"AMEVCNTR10_EL0", 0b11, 0b011, 0b1101, 0b1100, 0b000>;
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