Searched refs:AMEVCNTR17_EL0 (Results 1 – 7 of 7) sorted by relevance
| /external/arm-trusted-firmware/lib/extensions/amu/aarch64/ |
| D | amu_helpers.S | 113 read AMEVCNTR17_EL0 /* index 7 */
156 write AMEVCNTR17_EL0 /* index 7 */
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.4a-actmon.s | 32 msr AMEVCNTR17_EL0, x0
81 mrs x0, AMEVCNTR17_EL0
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-actmon.txt | 113 #CHECK: msr AMEVCNTR17_EL0, x0
162 #CHECK: mrs x0, AMEVCNTR17_EL0
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | arch.h | 947 #define AMEVCNTR17_EL0 S3_3_C13_C12_7 macro
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 902 AMEVCNTR17_EL0 = 57063,
2966 { "AMEVCNTR17_EL0", 0xDEE7, true, true, {AArch64::FeatureAM} }, // 712
3071 { "AMEVCNTR17_EL0", 712 },
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1389 def : RWSysReg<"AMEVCNTR17_EL0", 0b11, 0b011, 0b1101, 0b1100, 0b111>;
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1391 def : RWSysReg<"AMEVCNTR17_EL0", 0b11, 0b011, 0b1101, 0b1100, 0b111>;
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