Searched refs:AMEVCNTR18_EL0 (Results 1 – 7 of 7) sorted by relevance
| /external/arm-trusted-firmware/lib/extensions/amu/aarch64/ |
| D | amu_helpers.S | 114 read AMEVCNTR18_EL0 /* index 8 */
157 write AMEVCNTR18_EL0 /* index 8 */
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | armv8.4a-actmon.s | 33 msr AMEVCNTR18_EL0, x0
82 mrs x0, AMEVCNTR18_EL0
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| /external/llvm-project/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-actmon.txt | 114 #CHECK: msr AMEVCNTR18_EL0, x0
163 #CHECK: mrs x0, AMEVCNTR18_EL0
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| /external/arm-trusted-firmware/include/arch/aarch64/ |
| D | arch.h | 948 #define AMEVCNTR18_EL0 S3_3_C13_C13_0 macro
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSystemOperands.inc | 903 AMEVCNTR18_EL0 = 57064,
2967 { "AMEVCNTR18_EL0", 0xDEE8, true, true, {AArch64::FeatureAM} }, // 713
3072 { "AMEVCNTR18_EL0", 713 },
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1390 def : RWSysReg<"AMEVCNTR18_EL0", 0b11, 0b011, 0b1101, 0b1101, 0b000>;
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 1392 def : RWSysReg<"AMEVCNTR18_EL0", 0b11, 0b011, 0b1101, 0b1101, 0b000>;
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