Searched refs:ANDNP (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 188 ANDNP, enumerator
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| D | X86InstrFragmentsSIMD.td | 93 def X86andnp : SDNode<"X86ISD::ANDNP",
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| D | X86ISelLowering.cpp | 7454 V2 = DAG.getBitcast(VT, DAG.getNode(X86ISD::ANDNP, DL, MaskVT, in lowerVectorShuffleAsBitBlend()
22126 case X86ISD::ANDNP: return "X86ISD::ANDNP"; in getTargetNodeName()
27991 return DAG.getNode(X86ISD::ANDNP, DL, VT, N00, N1); in combineANDXORWithAllOnesIntoANDNP()
28309 if (N0.getOpcode() == X86ISD::ANDNP) in combineLogicBlendIntoPBLENDV()
28312 if (N0.getOpcode() != ISD::AND || N1.getOpcode() != X86ISD::ANDNP) in combineLogicBlendIntoPBLENDV()
29794 case X86ISD::FANDN: IntOpcode = X86ISD::ANDNP; break; in lowerX86FPLogicOp()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1137 case X86ISD::FANDN: Opc = X86ISD::ANDNP; break; in PreprocessISelDAG()
4149 Opc == X86ISD::ANDNP) in tryVPTERNLOG()
4178 case X86ISD::ANDNP: Imm = ~(TernlogMagicB) & TernlogMagicC; break; in tryVPTERNLOG()
4183 case X86ISD::ANDNP: in tryVPTERNLOG()
4506 N1.getOpcode() != X86ISD::ANDNP || in tryMatchBitSelect()
4720 case X86ISD::ANDNP: in Select()
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| D | X86ISelLowering.h | 195 ANDNP, enumerator
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| D | X86InstrFragmentsSIMD.td | 82 def X86andnp : SDNode<"X86ISD::ANDNP",
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| D | X86ISelLowering.cpp | 4835 case X86ISD::ANDNP: in isTargetShuffleVariableMask()
7443 case X86ISD::ANDNP: { in getFauxShuffleMask()
7449 bool IsAndN = (X86ISD::ANDNP == Opcode); in getFauxShuffleMask()
11785 V2 = DAG.getNode(X86ISD::ANDNP, DL, VT, V1Mask, V2); in lowerShuffleAsBitBlend()
30793 NODE_NAME_CASE(ANDNP) in getTargetNodeName()
31202 case X86ISD::ANDNP: in isBinOp()
34134 case X86ISD::ANDNP: { in computeKnownBitsForTargetNode()
34388 case X86ISD::ANDNP: { in ComputeNumSignBitsForTargetNode()
38695 case X86ISD::ANDNP: return X86ISD::FANDN; in getAltBitOpcode()
40356 AndN = DAG.getNode(X86ISD::ANDNP, DL, CondVT, Cond, CastRHS); in combineVSelectWithAllOnesOrZeros()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.h | 191 ANDNP, enumerator
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| D | X86InstrFragmentsSIMD.td | 78 def X86andnp : SDNode<"X86ISD::ANDNP",
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| D | X86ISelDAGToDAG.cpp | 967 case X86ISD::FANDN: Opc = X86ISD::ANDNP; break; in PreprocessISelDAG()
4387 N1.getOpcode() != X86ISD::ANDNP || in tryMatchBitSelect()
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| D | X86ISelLowering.cpp | 4737 case X86ISD::ANDNP: in isTargetShuffleVariableMask()
7150 case X86ISD::ANDNP: { in getFauxShuffleMask()
7156 bool IsAndN = (X86ISD::ANDNP == Opcode); in getFauxShuffleMask()
11166 V2 = DAG.getNode(X86ISD::ANDNP, DL, VT, V1Mask, V2); in lowerShuffleAsBitBlend()
29648 case X86ISD::ANDNP: return "X86ISD::ANDNP"; in getTargetNodeName()
30043 case X86ISD::ANDNP: in isBinOp()
32628 case X86ISD::ANDNP: { in computeKnownBitsForTargetNode()
32793 case X86ISD::ANDNP: { in ComputeNumSignBitsForTargetNode()
37618 SDValue AndN = DAG.getNode(X86ISD::ANDNP, DL, AndNVT, CastCond, CastRHS); in combineVSelectWithAllOnesOrZeros()
39865 return DAG.getNode(X86ISD::ANDNP, SDLoc(N), VT, X, Y); in combineANDXORWithAllOnesIntoANDNP()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenFastISel.inc | 10603 // FastEmit functions for X86ISD::ANDNP.
15146 case X86ISD::ANDNP: return fastEmit_X86ISD_ANDNP_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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