| /external/llvm/test/CodeGen/ARM/ |
| D | special-reg-acore.ll | 31 ; ACORE: msr APSR_g, r0
35 ; ACORE: msr APSR_g, r0
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | special-reg-acore.ll | 31 ; ACORE: msr APSR_g, r0
35 ; ACORE: msr APSR_g, r0
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 224 case APSR_g: in GetName()
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| D | instructions-aarch32.h | 841 APSR_g = 0x04, enumerator
846 CPSR_s = APSR_g,
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| /external/vixl/test/aarch32/ |
| D | test-simulator-cond-rd-rn-rm-q-t32.cc | 479 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-sel-t32.cc | 472 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-sel-a32.cc | 472 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-q-a32.cc | 479 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-ge-a32.cc | 495 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-ge-t32.cc | 495 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-t32.cc | 1581 __ Msr(APSR_g, ge_bits); in TestHelper()
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| D | test-simulator-cond-rd-rn-rm-a32.cc | 1583 __ Msr(APSR_g, ge_bits); in TestHelper()
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-basic-instructions.s | 309 msr APSR_g, #5
325 msr APSR_g, r0
1179 # CHECK-NEXT: 0 0 0.00 U msr APSR_g, #5
1195 # CHECK-NEXT: 0 0 0.00 U msr APSR_g, r0
2056 # CHECK-NEXT: - - - - - - - - msr APSR_g, #5
2072 # CHECK-NEXT: - - - - - - - - msr APSR_g, r0
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| D | cortex-a57-thumb.s | 393 msr APSR_g, r2
1301 # CHECK-NEXT: 0 0 0.00 U msr APSR_g, r2
2215 # CHECK-NEXT: - - - - - - - - msr APSR_g, r2
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 849 # CHECK: msr APSR_g, #5
883 # CHECK: msr APSR_g, r0
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| D | thumb2.txt | 1119 # CHECK: msr APSR_g, r2
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 849 # CHECK: msr APSR_g, #5
883 # CHECK: msr APSR_g, r0
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| D | thumb2.txt | 1119 # CHECK: msr APSR_g, r2
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1480 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3]
1517 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
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| D | basic-thumb2-instructions.s | 1771 @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 1450 @ CHECK: msr APSR_g, #5 @ encoding: [0x05,0xf0,0x24,0xe3]
1487 @ CHECK: msr APSR_g, r0 @ encoding: [0x00,0xf0,0x24,0xe1]
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| D | basic-thumb2-instructions.s | 1576 @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84]
|