| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 80 ARMSubtarget &ARMSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies()
87 ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU, in initializeFrameLowering()
89 ARMSubtarget &STI = initializeSubtargetDependencies(CPU, FS); in initializeFrameLowering()
96 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, in ARMSubtarget() function in ARMSubtarget
127 const CallLowering *ARMSubtarget::getCallLowering() const { in getCallLowering()
131 InstructionSelector *ARMSubtarget::getInstructionSelector() const { in getInstructionSelector()
135 const LegalizerInfo *ARMSubtarget::getLegalizerInfo() const { in getLegalizerInfo()
139 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo()
143 bool ARMSubtarget::isXRaySupported() const { in isXRaySupported()
148 void ARMSubtarget::initializeEnvironment() { in initializeEnvironment()
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| D | ARMBaseRegisterInfo.cpp | 62 static unsigned getFramePointerReg(const ARMSubtarget &STI) { in getFramePointerReg()
68 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
126 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
149 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
156 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getSjLjDispatchPreservedMask()
166 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
190 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
231 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in isInlineAsmReadOnlyReg()
259 if (MF.getSubtarget<ARMSubtarget>().hasNEON()) in getLargestLegalSuperClass()
283 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
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| D | ThumbRegisterInfo.cpp | 45 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getLargestLegalSuperClass()
56 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getPointerRegClass()
68 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitThumb1LoadConstPool()
108 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitLoadConstPool()
129 const ARMSubtarget &ST = MF.getSubtarget<ARMSubtarget>(); in emitThumbRegPlusImmInReg()
364 assert(MBB.getParent()->getSubtarget<ARMSubtarget>().isThumb1Only() && in rewriteFrameIndex()
432 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in resolveFrameIndex()
455 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in eliminateFrameIndex()
567 if (MF.getSubtarget<ARMSubtarget>().isThumb1Only()) { in useFPForScavengingIndex()
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| D | ARMTargetMachine.cpp | 259 const ARMSubtarget *
293 I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle, in getSubtargetImpl()
341 const ARMSubtarget &ST = C->MF->getSubtarget<ARMSubtarget>(); in createMachineScheduler()
351 const ARMSubtarget &ST = C->MF->getSubtarget<ARMSubtarget>(); in createPostMachineScheduler()
412 const auto &ST = this->TM->getSubtarget<ARMSubtarget>(F); in addIRPasses()
524 return this->TM->getSubtarget<ARMSubtarget>(F).hasMinSize() || in addPreSched2()
525 this->TM->getSubtarget<ARMSubtarget>(F).restrictIT(); in addPreSched2()
529 return !MF.getSubtarget<ARMSubtarget>().isThumb1Only(); in addPreSched2()
548 return MF.getSubtarget<ARMSubtarget>().isThumb2(); in addPreEmitPass()
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| D | ARMTargetMachine.h | 39 mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
48 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
52 const ARMSubtarget *getSubtargetImpl() const = delete;
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| D | ARMMachineFunctionInfo.cpp | 17 : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()), in ARMFunctionInfo()
18 hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()), in ARMFunctionInfo()
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| D | ARMInstrInfo.h | 20 class ARMSubtarget; variable
25 explicit ARMInstrInfo(const ARMSubtarget &STI);
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| D | ARMFrameLowering.h | 17 class ARMSubtarget; variable
23 const ARMSubtarget &STI;
26 explicit ARMFrameLowering(const ARMSubtarget &sti);
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| D | ARMLegalizerInfo.h | 24 class ARMSubtarget; variable
29 ARMLegalizerInfo(const ARMSubtarget &ST);
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 80 ARMSubtarget &ARMSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies()
87 ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU, in initializeFrameLowering()
89 ARMSubtarget &STI = initializeSubtargetDependencies(CPU, FS); in initializeFrameLowering()
96 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, in ARMSubtarget() function in ARMSubtarget
127 const CallLowering *ARMSubtarget::getCallLowering() const { in getCallLowering()
131 InstructionSelector *ARMSubtarget::getInstructionSelector() const { in getInstructionSelector()
135 const LegalizerInfo *ARMSubtarget::getLegalizerInfo() const { in getLegalizerInfo()
139 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo()
143 bool ARMSubtarget::isXRaySupported() const { in isXRaySupported()
148 void ARMSubtarget::initializeEnvironment() { in initializeEnvironment()
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| D | ThumbRegisterInfo.cpp | 45 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getLargestLegalSuperClass()
56 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getPointerRegClass()
68 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitThumb1LoadConstPool()
108 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitLoadConstPool()
130 const ARMSubtarget &ST = MF.getSubtarget<ARMSubtarget>(); in emitThumbRegPlusImmInReg()
365 assert(MBB.getParent()->getSubtarget<ARMSubtarget>().isThumb1Only() && in rewriteFrameIndex()
433 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in resolveFrameIndex()
456 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in eliminateFrameIndex()
568 if (MF.getSubtarget<ARMSubtarget>().isThumb1Only()) { in useFPForScavengingIndex()
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| D | ARMBaseRegisterInfo.cpp | 60 static unsigned getFramePointerReg(const ARMSubtarget &STI) { in getFramePointerReg()
66 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
124 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
147 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
154 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getSjLjDispatchPreservedMask()
164 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
188 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
242 if (MF.getSubtarget<ARMSubtarget>().hasNEON()) in getLargestLegalSuperClass()
266 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
426 if (!MRI->canReserveReg(getFramePointerReg(MF.getSubtarget<ARMSubtarget>()))) in canRealignStack()
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| D | ARMTargetMachine.cpp | 251 const ARMSubtarget *
287 I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle, in getSubtargetImpl()
335 const ARMSubtarget &ST = C->MF->getSubtarget<ARMSubtarget>(); in createMachineScheduler()
345 const ARMSubtarget &ST = C->MF->getSubtarget<ARMSubtarget>(); in createPostMachineScheduler()
404 const auto &ST = this->TM->getSubtarget<ARMSubtarget>(F); in addIRPasses()
512 return this->TM->getSubtarget<ARMSubtarget>(F).restrictIT(); in addPreSched2()
516 return !MF.getSubtarget<ARMSubtarget>().isThumb1Only(); in addPreSched2()
535 return MF.getSubtarget<ARMSubtarget>().isThumb2(); in addPreEmitPass()
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| D | ARMMachineFunctionInfo.cpp | 17 : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()), in ARMFunctionInfo()
18 hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()) {} in ARMFunctionInfo()
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| D | ARMFrameLowering.h | 18 class ARMSubtarget; variable
24 const ARMSubtarget &STI;
27 explicit ARMFrameLowering(const ARMSubtarget &sti);
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| D | ARMTargetMachine.h | 39 mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
48 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
52 const ARMSubtarget *getSubtargetImpl() const = delete;
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| D | ARMInstrInfo.h | 20 class ARMSubtarget; variable
25 explicit ARMInstrInfo(const ARMSubtarget &STI);
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| D | ARMLegalizerInfo.h | 24 class ARMSubtarget; variable
29 ARMLegalizerInfo(const ARMSubtarget &ST);
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 72 ARMSubtarget &ARMSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies()
79 ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU, in initializeFrameLowering()
81 ARMSubtarget &STI = initializeSubtargetDependencies(CPU, FS); in initializeFrameLowering()
88 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, in ARMSubtarget() function in ARMSubtarget
103 void ARMSubtarget::initializeEnvironment() { in initializeEnvironment()
114 void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) { in initSubtargetFeatures()
250 bool ARMSubtarget::isAPCS_ABI() const { in isAPCS_ABI()
254 bool ARMSubtarget::isAAPCS_ABI() const { in isAAPCS_ABI()
259 bool ARMSubtarget::isAAPCS16_ABI() const { in isAAPCS16_ABI()
264 bool ARMSubtarget::isGVIndirectSymbol(const GlobalValue *GV) const { in isGVIndirectSymbol()
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| D | ThumbRegisterInfo.cpp | 46 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getLargestLegalSuperClass()
57 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getPointerRegClass()
69 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitThumb1LoadConstPool()
108 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitLoadConstPool()
356 assert(MBB.getParent()->getSubtarget<ARMSubtarget>().isThumb1Only() && in rewriteFrameIndex()
424 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in resolveFrameIndex()
448 const ARMSubtarget &STI = MBB.getParent()->getSubtarget<ARMSubtarget>(); in saveScavengerRegister()
501 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in eliminateFrameIndex()
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| D | ARMBaseRegisterInfo.cpp | 51 static unsigned getFramePointerReg(const ARMSubtarget &STI) { in getFramePointerReg()
62 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
113 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
134 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
143 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
161 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
227 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
379 if (!MRI->canReserveReg(getFramePointerReg(MF.getSubtarget<ARMSubtarget>()))) in canRealignStack()
401 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getFrameRegister()
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| D | ARMTargetMachine.h | 35 ARMSubtarget Subtarget;
37 mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
46 const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; } in getSubtargetImpl()
47 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
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| D | ARMFrameLowering.h | 20 class ARMSubtarget; variable
24 const ARMSubtarget &STI;
27 explicit ARMFrameLowering(const ARMSubtarget &sti);
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| D | ARMInstrInfo.h | 21 class ARMSubtarget; variable
26 explicit ARMInstrInfo(const ARMSubtarget &STI);
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| D | ARMMachineFunctionInfo.cpp | 17 : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()), in ARMFunctionInfo()
18 hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()), in ARMFunctionInfo()
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