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Searched refs:ARM_DRAM2_BASE (Results 1 – 7 of 7) sorted by relevance

/external/arm-trusted-firmware/plat/arm/board/fvp_ve/include/
Dplatform_def.h29 #define ARM_DRAM2_BASE PLAT_ARM_DRAM2_BASE macro
31 #define ARM_DRAM2_END (ARM_DRAM2_BASE + \
101 ARM_DRAM2_BASE, \
/external/arm-trusted-firmware/plat/arm/common/
Darm_pm.c119 if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint < in arm_validate_ns_entrypoint()
120 (ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) { in arm_validate_ns_entrypoint()
Darm_nor_psci_mem_protect.c29 {ARM_DRAM2_BASE, 1u << ONE_GB_SHIFT},
/external/arm-trusted-firmware/plat/arm/board/n1sdp/
Dn1sdp_bl31_setup.c108 zero_normalmem((void *)ARM_DRAM2_BASE, dram2_size); in dmc_ecc_setup()
109 flush_dcache_range(ARM_DRAM2_BASE, dram2_size); in dmc_ecc_setup()
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h158 #define ARM_DRAM2_BASE PLAT_ARM_DRAM2_BASE macro
160 #define ARM_DRAM2_END (ARM_DRAM2_BASE + \
212 ARM_DRAM2_BASE, \
Dplat_arm.h48 {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
60 {ARM_DRAM2_BASE, ARM_DRAM2_END, ARM_TZC_NS_DRAM_S_ACCESS, \
/external/arm-trusted-firmware/plat/arm/board/juno/
Djuno_security.c52 {ARM_DRAM2_BASE, ARM_DRAM2_END,