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Searched refs:ARM_PWR_LVL0 (Results 1 – 8 of 8) sorted by relevance

/external/arm-trusted-firmware/plat/arm/board/fvp/
Dfvp_pm.c34 ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
37 ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
106 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_power_domain_on_finish_common()
186 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_off()
222 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend()
226 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend()
295 if (target_state->pwr_domain_state[ARM_PWR_LVL0] == in fvp_pwr_domain_suspend_finish()
342 if ((power_level != ARM_PWR_LVL0) && (power_level != ARM_PWR_LVL1)) in fvp_node_hw_state()
354 if (power_level == ARM_PWR_LVL0) { in fvp_node_hw_state()
375 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) in fvp_get_sys_suspend_power_state()
/external/arm-trusted-firmware/plat/arm/common/
Darm_pm.c42 if (pwr_lvl != ARM_PWR_LVL0) in arm_validate_power_state()
45 req_state->pwr_domain_state[ARM_PWR_LVL0] = in arm_validate_power_state()
48 for (i = ARM_PWR_LVL0; i <= pwr_lvl; i++) in arm_validate_power_state()
/external/arm-trusted-firmware/plat/arm/css/common/
Dcss_pm.c31 ARM_LOCAL_STATE_RET, ARM_PWR_LVL0, PSTATE_TYPE_STANDBY),
34 ARM_LOCAL_STATE_OFF, ARM_PWR_LVL0, PSTATE_TYPE_POWERDOWN),
277 for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) in css_get_sys_suspend_power_state()
/external/arm-trusted-firmware/drivers/arm/css/scp/
Dcss_pm_scpi.c83 if (power_level != ARM_PWR_LVL0 && power_level != ARM_PWR_LVL1) in css_scp_get_power_state()
92 if (power_level == ARM_PWR_LVL0) { in css_scp_get_power_state()
Dcss_pm_scmi.c113 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in css_scp_suspend()
139 SCMI_SET_PWR_STATE_LVL(scmi_pwr_state, ARM_PWR_LVL0, in css_scp_suspend()
182 assert(target_state->pwr_domain_state[ARM_PWR_LVL0] == in css_scp_off()
/external/arm-trusted-firmware/include/plat/arm/css/common/
Dcss_pm.h16 #define CSS_CORE_PWR_STATE(state) (state)->pwr_domain_state[ARM_PWR_LVL0]
/external/arm-trusted-firmware/plat/arm/board/corstone700/common/include/
Dplatform_def.h145 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h39 #define ARM_PWR_LVL0 MPIDR_AFFLVL0 macro