| /external/llvm-project/lld/ELF/Arch/ |
| D | RISCV.cpp | 45 AUIPC = 0x17, enumerator
161 write32le(buf + 0, utype(AUIPC, X_T2, hi20(offset))); in writePltHeader()
178 write32le(buf + 0, utype(AUIPC, X_T3, hi20(offset))); in writePlt()
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVExpandPseudoInsts.cpp | 129 BuildMI(NewMBB, DL, TII->get(RISCV::AUIPC), DestReg) in expandAuipcInstPair()
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| D | RISCVInstrInfo.td | 198 let ParserMatchClass = UImmAsmOperand<20, "AUIPC">;
426 def AUIPC : RVInstU<OPC_AUIPC, (outs GPR:$rd), (ins uimm20_auipc:$imm20),
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVMCCodeEmitter.cpp | 122 TmpInst = MCInstBuilder(RISCV::AUIPC) in expandFunctionCall()
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| /external/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVMCCodeEmitter.cpp | 139 TmpInst = MCInstBuilder(RISCV::AUIPC) in expandFunctionCall()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVExpandPseudoInsts.cpp | 643 BuildMI(NewMBB, DL, TII->get(RISCV::AUIPC), DestReg) in expandAuipcInstPair()
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| D | RISCVInstrInfo.td | 179 let ParserMatchClass = UImmAsmOperand<20, "AUIPC">;
376 def AUIPC : RVInstU<OPC_AUIPC, (outs GPR:$rd), (ins uimm20_auipc:$imm20),
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/AsmParser/ |
| D | RISCVAsmParser.cpp | 1679 Out, MCInstBuilder(RISCV::AUIPC).addOperand(TmpReg).addExpr(SymbolHi)); in emitAuipcInstPair()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 747 def AUIPC : R6MMR6Rel, AUIPC_ENC, AUIPC_DESC, ISA_MIPS32R6;
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| /external/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| D | RISCVAsmParser.cpp | 2173 Out, MCInstBuilder(RISCV::AUIPC).addOperand(TmpReg).addExpr(SymbolHi)); in emitAuipcInstPair()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 866 def AUIPC : R6MMR6Rel, AUIPC_ENC, AUIPC_DESC, ISA_MIPS32R6;
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| D | MipsScheduleGeneric.td | 60 AUIPC, BITSWAP, CLO_R6, CLZ_R6, LSA_R6,
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 866 def AUIPC : R6MMR6Rel, AUIPC_ENC, AUIPC_DESC, ISA_MIPS32R6;
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| D | MipsScheduleGeneric.td | 60 AUIPC, BITSWAP, CLO_R6, CLZ_R6, LSA_R6,
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 981 {DBGFIELD("AUIPC") 1, false, false, 1, 2, 1, 1, 0, 0}, // #721
2665 {DBGFIELD("AUIPC") 16383, false, false, 0, 0, 0, 0, 0, 0}, // #721
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| D | MipsGenMCCodeEmitter.inc | 745 UINT64_C(3961389056), // AUIPC
5819 case Mips::AUIPC: {
10207 CEFBS_HasStdEnc_HasMips32r6, // AUIPC = 732
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| D | MipsGenAsmWriter.inc | 1973 18468U, // AUIPC
4727 0U, // AUIPC
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| D | MipsGenInstrInfo.inc | 747 AUIPC = 732,
3501 AUIPC = 721,
5593 …modeledSideEffects), 0x6ULL, nullptr, nullptr, OperandInfo105, -1 ,nullptr }, // Inst #732 = AUIPC
16565 { Mips::AUIPC, Mips::AUIPC, Mips::AUIPC_MMR6 },
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| D | MipsGenDisassemblerTables.inc | 6716 /* 2375 */ MCD::OPC_Decode, 220, 5, 164, 1, // Opcode: AUIPC
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| D | MipsGenAsmMatcher.inc | 5593 …{ 590 /* auipc */, Mips::AUIPC, Convert__GPR32AsmReg1_0__SImm161_1, AMFBS_HasStdEnc_HasMips32r6, {…
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 155 18279U, // AUIPC
1944 0U, // AUIPC
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| D | MipsGenDisassemblerTables.inc | 4249 /* 1803 */ MCD_OPC_Decode, 138, 1, 251, 1, // Opcode: AUIPC
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