Searched refs:Add0 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | broadcast.ll | 44 %Add0 = add i64 %v1, %v2
54 store i64 %Add0, i64 *%idxS0, align 8
109 %Add0 = add i32 %v1, %v2
119 store i32 %Add0, i32 *%idxS0, align 8
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| /external/llvm-project/llvm/unittests/IR/ |
| D | PatternMatch.cpp | 1269 Value *Add0 = IRB.CreateExtractValue(Add, 0); in TEST_F() local
1272 EXPECT_TRUE(match(Add0, m_ExtractValue<0>(m_Value()))); in TEST_F()
1273 EXPECT_FALSE(match(Add0, m_ExtractValue<1>(m_Value()))); in TEST_F()
1280 EXPECT_FALSE(match(Add0, m_WithOverflowInst(WOI))); in TEST_F()
1284 EXPECT_TRUE(match(Add0, m_ExtractValue<0>(m_WithOverflowInst(WOI)))); in TEST_F()
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| /external/oboe/samples/RhythmGame/third_party/glm/detail/ |
| D | type_mat4x4.inl | 530 typename tmat4x4<T, P>::col_type const Add0 = Mul0 + Mul1; local
536 typename tmat4x4<T, P>::col_type const Add2 = Add0 + Add1;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3722 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
3728 NewShiftAmt = Add0; in tryShiftAmountMod()
3732 isa<ConstantSDNode>(Add0) && in tryShiftAmountMod()
3733 cast<ConstantSDNode>(Add0)->getZExtValue() != 0 && in tryShiftAmountMod()
3734 cast<ConstantSDNode>(Add0)->getZExtValue() % Size == 0) { in tryShiftAmountMod()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 3821 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
3827 NewShiftAmt = Add0; in tryShiftAmountMod()
3831 isa<ConstantSDNode>(Add0) && in tryShiftAmountMod()
3832 cast<ConstantSDNode>(Add0)->getZExtValue() != 0 && in tryShiftAmountMod()
3833 cast<ConstantSDNode>(Add0)->getZExtValue() % Size == 0) { in tryShiftAmountMod()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2599 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
2606 NewShiftAmt = Add0; in tryShiftAmountMod()
2610 isIntImmediate(Add0, Add0Imm) && Add0Imm != 0 && in tryShiftAmountMod()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 2780 SDValue Add0 = ShiftAmt->getOperand(0); in tryShiftAmountMod() local
2787 NewShiftAmt = Add0; in tryShiftAmountMod()
2791 isIntImmediate(Add0, Add0Imm) && Add0Imm != 0 && in tryShiftAmountMod()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2160 SDValue Add0 = DAG.getNode(ISD::ADD, DL, VT, N1, N0.getOperand(1)); in visitADDLike() local
2161 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), Add0); in visitADDLike()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 2346 if (SDValue Add0 = DAG.FoldConstantArithmetic(ISD::ADD, DL, VT, in visitADDLike() local
2348 return DAG.getNode(ISD::ADD, DL, VT, N0.getOperand(0), Add0); in visitADDLike()
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