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Searched refs:Adr (Results 1 – 10 of 10) sorted by relevance

/external/icu/icu4c/source/data/brkitr/
Dde.txt103 "Adr.",
113 "p.Adr.",
/external/vixl/benchmarks/aarch64/
Dbench-utils.cc210 __ Adr(PickX(), labels_.begin()->target); in GenerateTrivialSequence() local
348 __ Adr(reg, &fn); in GenerateCallReturnSequence() local
/external/vixl/test/aarch64/
Dtest-assembler-aarch64.cc2005 __ Adr(x1, &label_3); // Set to zero to indicate success. in TEST() local
2007 __ Adr(x2, &label_1); // Multiple forward references to the same label. in TEST() local
2008 __ Adr(x3, &label_1); in TEST() local
2009 __ Adr(x4, &label_1); in TEST() local
2019 __ Adr(x2, &label_3); // Self-reference (offset 0). in TEST() local
2021 __ Adr(x2, &label_4); // Simple forward reference. in TEST() local
2025 __ Adr(x2, &label_3); // Multiple reverse references to the same label. in TEST() local
2026 __ Adr(x3, &label_3); in TEST() local
2027 __ Adr(x4, &label_3); in TEST() local
2028 __ Adr(x5, &label_2); // Simple reverse reference. in TEST() local
[all …]
Dtest-assembler-sve-aarch64.cc136 masm->Adr(temp, &data); in Initialise()
18490 __ Adr(z3.VnD(), SVEMemOperand(z0.VnD(), z1.VnD())); in TEST_SVE() local
18491 __ Adr(z4.VnD(), SVEMemOperand(z0.VnD(), z1.VnD(), LSL, 1)); in TEST_SVE() local
18492 __ Adr(z5.VnD(), SVEMemOperand(z0.VnD(), z1.VnD(), LSL, 2)); in TEST_SVE() local
18493 __ Adr(z6.VnD(), SVEMemOperand(z0.VnD(), z1.VnD(), LSL, 3)); in TEST_SVE() local
18494 __ Adr(z7.VnD(), SVEMemOperand(z0.VnD(), z2.VnD(), UXTW)); in TEST_SVE() local
18495 __ Adr(z8.VnD(), SVEMemOperand(z0.VnD(), z2.VnD(), UXTW, 1)); in TEST_SVE() local
18496 __ Adr(z9.VnD(), SVEMemOperand(z0.VnD(), z2.VnD(), UXTW, 2)); in TEST_SVE() local
18497 __ Adr(z10.VnD(), SVEMemOperand(z0.VnD(), z2.VnD(), UXTW, 3)); in TEST_SVE() local
18498 __ Adr(z11.VnD(), SVEMemOperand(z0.VnD(), z2.VnD(), SXTW)); in TEST_SVE() local
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc1180 __ Adr(r4, &big_literal); in TEST() local
1229 __ Adr(r4, &big_literal); in TEST() local
1524 __ Adr(r4, &big_literal); in TEST() local
1568 __ Adr(r2, &big_literal); in TEST() local
1629 __ Adr(r2, &big_literal); in EmitLdrdLiteralStressTest() local
2050 __ Adr(r0, &hello_string); in TEST() local
2082 __ Adr(r4, &l1); in TEST() local
2085 __ Adr(r5, &l1); in TEST() local
2972 __ Adr(r2, &literal); in TEST() local
5168 __ Adr(r11, &big_literal); in TEST_T32() local
Dtest-disasm-a32.cc2719 COMPARE_A32(Adr(pc, &literal), "adr pc, 0x00000004\n"); in TEST()
2720 MUST_FAIL_TEST_T32(Adr(pc, &literal), "Unpredictable instruction.\n"); in TEST()
/external/vixl/src/aarch32/
Dmacro-assembler-aarch32.cc465 Adr(r0, format_literal); in Printf()
590 Adr(r0, format_literal); in Printf()
Dmacro-assembler-aarch32.h555 void Adr(Condition cond, Register rd, RawLiteral* literal) { in Adr() function
574 void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); } in Adr() function
/external/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc2614 Adr(x0, &format_address); in PrintfNoPreserve()
Dmacro-assembler-aarch64.h1063 void Adr(const Register& rd, Label* label) { in Adr() function
3492 void Adr(const ZRegister& zd, const SVEMemOperand& addr) { in Adr() function