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Searched refs:AreAliased (Results 1 – 4 of 4) sorted by relevance

/external/vixl/test/aarch64/
Dtest-api-aarch64.cc607 VIXL_CHECK(AreAliased(z5, z5)); in TEST()
608 VIXL_CHECK(AreAliased(z5, b5)); in TEST()
609 VIXL_CHECK(AreAliased(b5, z5)); in TEST()
610 VIXL_CHECK(AreAliased(z5, z5.B())); in TEST()
611 VIXL_CHECK(AreAliased(z5, z5.VnB())); in TEST()
613 VIXL_CHECK(!AreAliased(z6, z7)); in TEST()
614 VIXL_CHECK(!AreAliased(b6, z7)); in TEST()
615 VIXL_CHECK(!AreAliased(x7, z7)); in TEST()
/external/vixl/src/aarch64/
Dregisters-aarch64.cc173 bool AreAliased(const CPURegister& reg1, in AreAliased() function
Dregisters-aarch64.h837 bool AreAliased(const CPURegister& reg1,
Dmacro-assembler-aarch64.cc2083 VIXL_ASSERT(!AreAliased(dst0, dst1, dst2, dst3)); in Pop()
3082 VIXL_ASSERT(!AreAliased(result, xzr, sp)); in AcquireFrom()