| /external/llvm/test/CodeGen/X86/ |
| D | TruncAssertZext.ll | 3 ; the source of the zext is an AssertSext node
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | TruncAssertSext.ll | 4 ; the source of the zext is an AssertSext node
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 57 AssertSext, AssertZext, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 58 AssertSext, AssertZext, enumerator
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 59 AssertSext, enumerator
|
| /external/llvm-project/llvm/test/DebugInfo/X86/ |
| D | dbg-value-transfer-order.ll | 21 ; interesting in this example is that the !range metadata produces an AssertSext
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 53 case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break; in PromoteIntegerResult()
175 return DAG.getNode(ISD::AssertSext, SDLoc(N), in PromoteIntRes_AssertSext()
436 ISD::AssertZext : ISD::AssertSext, dl, NVT, Res, in PromoteIntRes_FP_TO_XINT()
958 if (OpL->getOpcode() == ISD::AssertSext && in PromoteSetCCOperands()
960 OpR->getOpcode() == ISD::AssertSext && in PromoteSetCCOperands()
1312 case ISD::AssertSext: ExpandIntRes_AssertSext(N, Lo, Hi); break; in ExpandIntegerResult()
1897 Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi, in ExpandIntRes_AssertSext()
1901 Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT)); in ExpandIntRes_AssertSext()
|
| D | SelectionDAGDumper.cpp | 85 case ISD::AssertSext: return "AssertSext"; in getOperationName()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 190 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 247 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 107 case ISD::AssertSext: return "AssertSext"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 56 case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break; in PromoteIntegerResult()
217 return DAG.getNode(ISD::AssertSext, SDLoc(N), in PromoteIntRes_AssertSext()
546 ISD::AssertZext : ISD::AssertSext, dl, NVT, Res, in PromoteIntRes_FP_TO_XINT()
1803 case ISD::AssertSext: ExpandIntRes_AssertSext(N, Lo, Hi); break; in ExpandIntegerResult()
2536 Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi, in ExpandIntRes_AssertSext()
2540 Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT)); in ExpandIntRes_AssertSext()
|
| /external/llvm-project/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 387 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments()
739 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall()
|
| /external/llvm-project/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 280 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerFormalArguments()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 436 Opc != ISD::CopyFromReg && Opc != ISD::AssertSext && in isDef32()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 107 case ISD::AssertSext: return "AssertSext"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 56 case ISD::AssertSext: Res = PromoteIntRes_AssertSext(N); break; in PromoteIntegerResult()
240 return DAG.getNode(ISD::AssertSext, SDLoc(N), in PromoteIntRes_AssertSext()
595 ISD::AssertZext : ISD::AssertSext, dl, NVT, Res, in PromoteIntRes_FP_TO_XINT()
2031 case ISD::AssertSext: ExpandIntRes_AssertSext(N, Lo, Hi); break; in ExpandIntegerResult()
2813 Hi = DAG.getNode(ISD::AssertSext, dl, NVT, Hi, in ExpandIntRes_AssertSext()
2817 Lo = DAG.getNode(ISD::AssertSext, dl, NVT, Lo, DAG.getValueType(EVT)); in ExpandIntRes_AssertSext()
|
| /external/llvm-project/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 452 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg, in LowerFormalArguments_32()
611 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
1327 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall_64()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 455 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg, in LowerFormalArguments_32()
620 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
1390 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall_64()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 454 Arg = DAG.getNode(ISD::AssertSext, dl, MVT::i32, Arg, in LowerFormalArguments_32()
613 Arg = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Arg, in LowerFormalArguments_64()
1329 RV = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), RV, in LowerCall_64()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 455 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerCCCArguments()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAG.cpp | 1470 case ISD::AssertSext: in isValueExtension()
|
| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 471 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiISelLowering.cpp | 455 ArgValue = DAG.getNode(ISD::AssertSext, DL, RegVT, ArgValue, in LowerCCCArguments()
|