| /external/clang/test/Layout/ |
| D | ms-x86-lazy-empty-nonvirtual-base.cpp | 18 struct B10 { char c[7]; B10() { printf("B10 = %p\n", this); } }; in B10() argument
239 struct AA2 : B10, B1, virtual B0 {
267 struct AB2 : B10, B1, virtual B0 {
293 struct AC2 : B10, B1, virtual B0 {
319 struct AD2 : B10, B1, virtual B0 {
|
| /external/llvm-project/clang/test/Layout/ |
| D | ms-x86-lazy-empty-nonvirtual-base.cpp | 18 struct B10 { char c[7]; B10() { printf("B10 = %p\n", this); } }; in B10() argument
239 struct AA2 : B10, B1, virtual B0 {
267 struct AB2 : B10, B1, virtual B0 {
293 struct AC2 : B10, B1, virtual B0 {
319 struct AD2 : B10, B1, virtual B0 {
|
| /external/llvm-project/llvm/test/TableGen/ |
| D | cond-usage.td | 9 // CHECK: B10
27 def B10 : A<10>;
|
| /external/crosvm/devices/src/usb/xhci/ |
| D | xhci_abi.rs | 301 interrupter_target: B10,
325 interrupter_target: B10,
342 interrupter_target: B10,
361 interrupter_target: B10,
379 interrupter_target: B10,
400 interrupter_target: B10,
416 interrupter_target: B10,
433 interrupter_target: B10,
824 interrupter_target: B10,
|
| /external/llvm-project/llvm/test/Transforms/SCCP/ |
| D | latticeval-invalidate.ll | 15 %B10 = urem i64 %B, %B8
20 %C5 = icmp uge i64 %B, %B10
|
| /external/cldr/tools/java/org/unicode/cldr/draft/keyboard/windows/ |
| D | windows-keycodes.csv | 49 53,B10
|
| /external/cldr/tools/java/org/unicode/cldr/draft/keyboard/osx/ |
| D | osx-keycodes.csv | 50 44,B10
|
| /external/cldr/tools/java/org/unicode/cldr/draft/keyboard/ |
| D | IsoLayoutPosition.java | 46 …"."), B10('B', 10, "/"), B11('B', 11, "(key to right of /)"), B12('B', 12, "(2 keys to right of /)… enumConstant
|
| /external/libcups/data/ |
| D | media.defs | 66 #media "B10/JIS B10" 91 127
155 #media "ISOB10/B10" 88 125
|
| /external/llvm-project/polly/test/Isl/CodeGen/ |
| D | exprModDiv.ll | 31 ; CHECK: %polly.access.B10 = getelementptr float, float* %B, i64 %pexp.p_div_q
46 ; POW2: %polly.access.B10 = getelementptr float, float* %B, i64 %pexp.p_div_q
|
| /external/llvm-project/polly/test/ScopInfo/ |
| D | complex-successor-structure.ll | 84 ; B10<-+
507 br i1 %cmp77.10, label %A10, label %B10
512 br label %B10
514 B10: ; preds = %A10, %B9
520 A11: ; preds = %B10
525 B11: ; preds = %A11, %B10
526 %57 = phi i16 [ %add84.10, %A11 ], [ %.reload153, %B10 ]
|
| D | complex-successor-structure-2.ll | 85 ; B10<-+
508 br i1 %cmp77.10, label %A10, label %B10
513 br label %B10
515 B10: ; preds = %A10, %B9
521 A11: ; preds = %B10
526 B11: ; preds = %A11, %B10
527 %57 = phi i16 [ %add84.10, %A11 ], [ %.reload153, %B10 ]
|
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 549 B11 | B10 | B9 | B8 | B7 | B4 | B3 | B2 | B1 | B0;
565 B11 | B10 | B9 | B8 | B7 | B4 |
1216 EmitSIMDqqq(B11 | B10 | B8, kSWord, qd, qn, qm);
1226 EmitSIMDqqq(B21 | B11 | B10 | B8, kSWord, qd, qn, qm); in vsubqs()
1238 EmitSIMDqqq(B24 | B11 | B10 | B8 | B4, kSWord, qd, qn, qm);
1244 EmitSIMDqqq(B25 | B10, sz, qd, qn, qm);
1251 EmitSIMDqqq(B25 | B24 | B10, sz, qd, qn, qm);
1276 EmitSIMDqqq(B25 | B24 | B23 | B10 | B8 | B7, kWordPair, qd, Q0, qm);
1281 EmitSIMDqqq(B21 | B11 | B10 | B9 | B8, kSWord, qd, qn, qm); in vminqs()
1285 EmitSIMDqqq(B11 | B10 | B9 | B8, kSWord, qd, qn, qm); in vmaxqs()
[all …]
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 122 case AArch64::D10: return AArch64::B10; in getBRegFromDReg()
162 case AArch64::B10: return AArch64::D10; in getDRegFromBReg()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 226 def B10 : AArch64Reg<10, "b10">, DwarfRegNum<[74]>;
260 def H10 : AArch64Reg<10, "h10", [B10]>, DwarfRegAlias<B10>;
295 def S10 : AArch64Reg<10, "s10", [H10]>, DwarfRegAlias<B10>;
330 def D10 : AArch64Reg<10, "d10", [S10], ["v10", ""]>, DwarfRegAlias<B10>;
365 def Q10 : AArch64Reg<10, "q10", [D10], ["v10", ""]>, DwarfRegAlias<B10>;
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 46 static constexpr IValueT B10 = 1 << 10; variable
1208 (getXXXXInRegYXXXX(Dd) << 12) | (IsFloatTy ? B10 : 0) | in emitSIMDBase()
1261 B24 | B23 | B21 | B20 | B19 | B17 | B16 | B10 | B9 | Opcode; in emitSIMDCvtqq()
1653 IValueT Encoding = (Cond << kConditionShift) | B24 | B23 | B11 | B10 | B9 | in emitMemExOp()
2145 B17 | B16 | B11 | B10 | B9 | B8 | B5 | B4; in rbit()
2157 B16 | B11 | B10 | B9 | B8 | B5 | B4; in rev()
2466 constexpr IValueT VceqOpcode = B11 | B10 | B9; in vceqqs()
2502 constexpr IValueT VcgeOpcode = B24 | B11 | B10 | B9; in vcgeqs()
2538 constexpr IValueT VcgeOpcode = B24 | B21 | B11 | B10 | B9; in vcgtqs()
3358 B25 | (Unsigned ? B24 : 0) | B23 | (B20) | B11 | B10; in vmulh()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 121 case AArch64::D10: return AArch64::B10; in getBRegFromDReg()
161 case AArch64::B10: return AArch64::D10; in getDRegFromBReg()
|
| /external/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 121 case AArch64::D10: return AArch64::B10; in getBRegFromDReg()
161 case AArch64::B10: return AArch64::D10; in getDRegFromBReg()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 262 def B10 : AArch64Reg<10, "b10">, DwarfRegNum<[74]>;
296 def H10 : AArch64Reg<10, "h10", [B10]>, DwarfRegAlias<B10>;
331 def S10 : AArch64Reg<10, "s10", [H10]>, DwarfRegAlias<B10>;
366 def D10 : AArch64Reg<10, "d10", [S10], ["v10", ""]>, DwarfRegAlias<B10>;
401 def Q10 : AArch64Reg<10, "q10", [D10], ["v10", ""]>, DwarfRegAlias<B10>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 259 def B10 : AArch64Reg<10, "b10">, DwarfRegNum<[74]>;
293 def H10 : AArch64Reg<10, "h10", [B10]>, DwarfRegAlias<B10>;
328 def S10 : AArch64Reg<10, "s10", [H10]>, DwarfRegAlias<B10>;
363 def D10 : AArch64Reg<10, "d10", [S10], ["v10", ""]>, DwarfRegAlias<B10>;
398 def Q10 : AArch64Reg<10, "q10", [D10], ["v10", ""]>, DwarfRegAlias<B10>;
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | fmaddsub-combine.ll | 297 %B10 = extractelement <16 x float> %B, i32 10
298 %sub10 = fsub float %A10, %B10
566 %B10 = extractelement <16 x float> %B, i32 10
567 %sub10 = fadd float %A10, %B10
|
| D | combine-srem.ll | 408 %B10 = udiv i32 %L6, %B14
409 %B6 = and i32 %B16, %B10
|
| /external/harfbuzz_ng/test/shaping/data/in-house/tests/ |
| D | indic-vowel-letter-spoofing.tests | 39 ../fonts/2c25beb56d9c556622d56b0b5d02b4670c034f89.ttf::U+0B10,U+0020,U+0B0F,U+0B57:[aiorya=0+1681|s…
|
| /external/protobuf/python/google/protobuf/internal/ |
| D | more_messages.proto | 114 message B10 {} message
|
| /external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| D | device1.ini | 81 B10=0x00000000 key
|