| /external/tensorflow/tensorflow/lite/micro/tools/make/targets/ |
| D | xcore_makefile.inc | 9 …s.com/download/Tools-15---Linux-64%2815.0.0_rc1%29.tgz?key=132D-9DC9-E913-0229-ECE6-D5AB-F511-2B19"
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| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 131 case AArch64::D19: return AArch64::B19; in getBRegFromDReg()
171 case AArch64::B19: return AArch64::D19; in getDRegFromBReg()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 235 def B19 : AArch64Reg<19, "b19">, DwarfRegNum<[83]>;
269 def H19 : AArch64Reg<19, "h19", [B19]>, DwarfRegAlias<B19>;
304 def S19 : AArch64Reg<19, "s19", [H19]>, DwarfRegAlias<B19>;
339 def D19 : AArch64Reg<19, "d19", [S19], ["v19", ""]>, DwarfRegAlias<B19>;
374 def Q19 : AArch64Reg<19, "q19", [D19], ["v19", ""]>, DwarfRegAlias<B19>;
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 55 static constexpr IValueT B19 = 1 << 19; variable
1261 B24 | B23 | B21 | B20 | B19 | B17 | B16 | B10 | B9 | Opcode; in emitSIMDCvtqq()
1524 B21 | B20 | B19 | B18 | B17 | B16 | B15 | B14 | B13 | B12 | B6 | B4 | in dmb()
2144 constexpr IValueT RbitOpcode = B26 | B25 | B23 | B22 | B21 | B20 | B19 | B18 | in rbit()
2156 constexpr IValueT RevOpcode = B26 | B25 | B23 | B21 | B20 | B19 | B18 | B17 | in rev()
2604 constexpr IValueT VcvtdiOpcode = B23 | B21 | B20 | B19 | B8 | B7 | B6; in vcvtdi()
2618 constexpr IValueT VcvtduOpcode = B23 | B21 | B20 | B19 | B8 | B6; in vcvtdu()
2642 constexpr IValueT VcvtisOpcode = B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6; in vcvtis()
2658 B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6; in vcvtid()
2672 constexpr IValueT VcvtsiOpcode = B23 | B21 | B20 | B19 | B7 | B6; in vcvtsi()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 130 case AArch64::D19: return AArch64::B19; in getBRegFromDReg()
170 case AArch64::B19: return AArch64::D19; in getDRegFromBReg()
|
| /external/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 130 case AArch64::D19: return AArch64::B19; in getBRegFromDReg()
170 case AArch64::B19: return AArch64::D19; in getDRegFromBReg()
|
| /external/llvm-project/llvm/test/Transforms/InstCombine/ |
| D | and-or-icmps.ll | 220 ; CHECK-NEXT: [[B19:%.*]] = xor i1 [[C11]], [[B15]]
222 ; CHECK-NEXT: [[C3:%.*]] = and i1 [[TMP2]], [[B19]]
252 %B19 = add i1 %C11, %B15
253 %C6 = icmp sge i1 %C11, %B19
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| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 1071 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B16 | B7 | B6, sd, S0, sm);
1076 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B16 | B8 | B7 | B6, sd, dm); in vcvtid()
1082 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B7 | B6, sd, S0, sm);
1087 EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B7 | B6, dd, sm);
1092 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B18 | B7 | B6, sd, S0, sm);
1097 EmitVFPsd(cond, B23 | B21 | B20 | B19 | B18 | B8 | B7 | B6, sd, dm);
1102 EmitVFPsss(cond, B23 | B21 | B20 | B19 | B6, sd, S0, sm);
1107 EmitVFPds(cond, B23 | B21 | B20 | B19 | B8 | B6, dd, sm);
1291 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B16 | B10 | B9 | B8, kSWord,
1297 EmitSIMDqqq(B24 | B23 | B21 | B20 | B19 | B16 | B10 | B9 | B8 | B7, kSWord,
[all …]
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| D | assembler_arm.h | 62 B19 = 1 << 19,
|
| /external/harfbuzz_ng/test/shaping/data/text-rendering-tests/tests/ |
| D | SHBALI-1.tests | 4 ….ttf:--font-size=1000 --ned --remove-default-ignorables --font-funcs=ft:U+1B19,U+1B40:[gid66|gid29…
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 271 def B19 : AArch64Reg<19, "b19">, DwarfRegNum<[83]>;
305 def H19 : AArch64Reg<19, "h19", [B19]>, DwarfRegAlias<B19>;
340 def S19 : AArch64Reg<19, "s19", [H19]>, DwarfRegAlias<B19>;
375 def D19 : AArch64Reg<19, "d19", [S19], ["v19", ""]>, DwarfRegAlias<B19>;
410 def Q19 : AArch64Reg<19, "q19", [D19], ["v19", ""]>, DwarfRegAlias<B19>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 268 def B19 : AArch64Reg<19, "b19">, DwarfRegNum<[83]>;
302 def H19 : AArch64Reg<19, "h19", [B19]>, DwarfRegAlias<B19>;
337 def S19 : AArch64Reg<19, "s19", [H19]>, DwarfRegAlias<B19>;
372 def D19 : AArch64Reg<19, "d19", [S19], ["v19", ""]>, DwarfRegAlias<B19>;
407 def Q19 : AArch64Reg<19, "q19", [D19], ["v19", ""]>, DwarfRegAlias<B19>;
|
| /external/protobuf/python/google/protobuf/internal/ |
| D | more_messages.proto | 123 message B19 {} message
|
| /external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| D | device1.ini | 90 B19=0x00000000 key
|
| /external/OpenCSD/decoder/tests/snapshots/a57_single_step/ |
| D | device1.ini | 90 B19=0x00000000 key
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/ |
| D | unroll-n-jam-smlad.ll | 169 %B19 = load i16, i16* %arrayidx4.us.i.3.2.i, align 2
170 %conv.us.i.3.2.i = sext i16 %B19 to i32
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| /external/crosvm/devices/src/usb/xhci/ |
| D | xhci_abi.rs | 826 reserved3: B19,
|
| /external/python/cpython3/Tools/unicode/python-mappings/diff/ |
| D | jisx0213-2004-std.txt.diff | 292 3-2F7C U+5B19 # <cjk> [2000]
|
| /external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/ |
| D | arith-mul-umulo.ll | 335 ; CHECK-NEXT: [[B19:%.*]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,…
367 ; CHECK-NEXT: [[C19:%.*]] = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 [[A19]], i16 [[B19…
694 ; CHECK-NEXT: [[B19:%.*]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 …
758 ; CHECK-NEXT: [[C19:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[A19]], i8 [[B19]])
|
| D | arith-add-uaddo.ll | 335 ; CHECK-NEXT: [[B19:%.*]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,…
367 ; CHECK-NEXT: [[C19:%.*]] = call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 [[A19]], i16 [[B19…
694 ; CHECK-NEXT: [[B19:%.*]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 …
758 ; CHECK-NEXT: [[C19:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[A19]], i8 [[B19]])
|
| D | arith-mul-smulo.ll | 335 ; CHECK-NEXT: [[B19:%.*]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,…
367 ; CHECK-NEXT: [[C19:%.*]] = call { i16, i1 } @llvm.smul.with.overflow.i16(i16 [[A19]], i16 [[B19…
694 ; CHECK-NEXT: [[B19:%.*]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 …
758 ; CHECK-NEXT: [[C19:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[A19]], i8 [[B19]])
|
| D | arith-sub-usubo.ll | 335 ; CHECK-NEXT: [[B19:%.*]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,…
367 ; CHECK-NEXT: [[C19:%.*]] = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 [[A19]], i16 [[B19…
694 ; CHECK-NEXT: [[B19:%.*]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 …
758 ; CHECK-NEXT: [[C19:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[A19]], i8 [[B19]])
|
| D | arith-sub-ssubo.ll | 335 ; CHECK-NEXT: [[B19:%.*]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,…
367 ; CHECK-NEXT: [[C19:%.*]] = call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 [[A19]], i16 [[B19…
694 ; CHECK-NEXT: [[B19:%.*]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 …
758 ; CHECK-NEXT: [[C19:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[A19]], i8 [[B19]])
|
| D | arith-add-saddo.ll | 335 ; CHECK-NEXT: [[B19:%.*]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,…
367 ; CHECK-NEXT: [[C19:%.*]] = call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 [[A19]], i16 [[B19…
694 ; CHECK-NEXT: [[B19:%.*]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 …
758 ; CHECK-NEXT: [[C19:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[A19]], i8 [[B19]])
|
| /external/icu/icu4c/source/data/unidata/norm2/ |
| D | nfc.txt | 2107 2F8CE>3B19
|