| /external/icu/icu4c/source/samples/layout/ |
| D | layout.sln | 3 …4A-11D0-8D11-00A0C91BC942}") = "layout", "layout.vcxproj", "{497500ED-DE1D-4B20-B529-F41B5A0FBEEB}"
13 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Debug|Win32.ActiveCfg = Debug|Win32
14 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Debug|Win32.Build.0 = Debug|Win32
15 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Debug|x64.ActiveCfg = Debug|x64
16 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Debug|x64.Build.0 = Debug|x64
17 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Release|Win32.ActiveCfg = Release|Win32
18 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Release|Win32.Build.0 = Release|Win32
19 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Release|x64.ActiveCfg = Release|x64
20 {497500ED-DE1D-4B20-B529-F41B5A0FBEEB}.Release|x64.Build.0 = Release|x64
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | rename-disconnected-bug.ll | 15 br i1 undef, label %B20.1, label %B20.2
17 B20.1:
18 br label %B20.2
20 B20.2:
21 %v2 = phi <4 x float> [ zeroinitializer, %B20.1 ], [ %v0, %B2 ]
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | rename-disconnected-bug.ll | 15 br i1 undef, label %B20.1, label %B20.2
17 B20.1:
18 br label %B20.2
20 B20.2:
21 %v2 = phi <4 x float> [ zeroinitializer, %B20.1 ], [ %v0, %B2 ]
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
|
| /external/llvm-project/llvm/test/CodeGen/X86/ |
| D | pr38539.ll | 39 %B20 = and i66 %L17, -1
45 %B8 = srem i66 0, %B20
46 %C2 = icmp ule i66 %B8, %B20
94 %B20 = and i34 %L17, -1
100 %B8 = srem i34 0, %B20
101 %C2 = icmp ule i34 %B8, %B20
|
| /external/llvm-project/llvm/test/Analysis/BasicAA/ |
| D | pr35821.ll | 8 %B20 = shl i8 -128, 16
9 %G47 = getelementptr i1*, i1** undef, i8 %B20
|
| /external/llvm-project/llvm/test/Transforms/ADCE/ |
| D | 2016-09-06.ll | 30 ; CHECK: br label %B20
31 br i1 %I15, label %B16, label %B20
42 B20:
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 56 static constexpr IValueT B20 = 1 << 20; variable
1071 B25 | B24 | B20 | B15 | B14 | B13 | B12 | B4 | in emitDivOp()
1125 constexpr IValueT VmovssOpcode = B23 | B21 | B20 | B6; in emitMoveSS()
1187 Opcode |= B20; in emitSignExtend()
1261 B24 | B23 | B21 | B20 | B19 | B17 | B16 | B10 | B9 | Opcode; in emitSIMDCvtqq()
1524 B21 | B20 | B19 | B18 | B17 | B16 | B15 | B14 | B13 | B12 | B6 | B4 | in dmb()
2144 constexpr IValueT RbitOpcode = B26 | B25 | B23 | B22 | B21 | B20 | B19 | B18 | in rbit()
2156 constexpr IValueT RevOpcode = B26 | B25 | B23 | B21 | B20 | B19 | B18 | B17 | in rev()
2336 constexpr IValueT VabssOpcode = B23 | B21 | B20 | B7 | B6; in vabss()
2350 constexpr IValueT VabsdOpcode = B23 | B21 | B20 | B7 | B6; in vabsd()
[all …]
|
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 368 EmitMulOp(cond, B20, R0, rd, rn, rm); in muls()
446 B26 | B25 | B24 | B20 | B4 |
574 B21 | B20 | (0xff << 12) | B4 | 0xf; in clrex()
612 B27 | B26 | B25 | B20 |
654 B26 | B22 | B20 | (static_cast<int32_t>(rt2) * B16) | in vmovrrs()
715 B27 | B26 | B22 | B20 |
729 B27 | B26 | B24 | B20 |
755 B27 | B26 | B24 | B20 |
881 EmitVFPsss(cond, B23 | B21 | B20 | B6, sd, S0, sm);
886 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm);
[all …]
|
| /external/llvm-project/llvm/test/TableGen/ |
| D | foreach-multiclass.td | 20 // CHECK: def B20 {
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 132 case AArch64::D20: return AArch64::B20; in getBRegFromDReg()
172 case AArch64::B20: return AArch64::D20; in getDRegFromBReg()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 236 def B20 : AArch64Reg<20, "b20">, DwarfRegNum<[84]>;
270 def H20 : AArch64Reg<20, "h20", [B20]>, DwarfRegAlias<B20>;
305 def S20 : AArch64Reg<20, "s20", [H20]>, DwarfRegAlias<B20>;
340 def D20 : AArch64Reg<20, "d20", [S20], ["v20", ""]>, DwarfRegAlias<B20>;
375 def Q20 : AArch64Reg<20, "q20", [D20], ["v20", ""]>, DwarfRegAlias<B20>;
|
| /external/llvm-project/llvm/test/MC/COFF/ |
| D | cv-loc-unreachable.s | 37 # CODEVIEW-NEXT: 0B20 code 0x0 (+0x0) line 1 (+1)
|
| D | cv-loc-unreachable-2.s | 26 # CODEVIEW-NEXT: 0B20 code 0x0 (+0x0) line 1 (+1)
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 131 case AArch64::D20: return AArch64::B20; in getBRegFromDReg()
171 case AArch64::B20: return AArch64::D20; in getDRegFromBReg()
|
| /external/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 131 case AArch64::D20: return AArch64::B20; in getBRegFromDReg()
171 case AArch64::B20: return AArch64::D20; in getDRegFromBReg()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 272 def B20 : AArch64Reg<20, "b20">, DwarfRegNum<[84]>;
306 def H20 : AArch64Reg<20, "h20", [B20]>, DwarfRegAlias<B20>;
341 def S20 : AArch64Reg<20, "s20", [H20]>, DwarfRegAlias<B20>;
376 def D20 : AArch64Reg<20, "d20", [S20], ["v20", ""]>, DwarfRegAlias<B20>;
411 def Q20 : AArch64Reg<20, "q20", [D20], ["v20", ""]>, DwarfRegAlias<B20>;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.td | 269 def B20 : AArch64Reg<20, "b20">, DwarfRegNum<[84]>;
303 def H20 : AArch64Reg<20, "h20", [B20]>, DwarfRegAlias<B20>;
338 def S20 : AArch64Reg<20, "s20", [H20]>, DwarfRegAlias<B20>;
373 def D20 : AArch64Reg<20, "d20", [S20], ["v20", ""]>, DwarfRegAlias<B20>;
408 def Q20 : AArch64Reg<20, "q20", [D20], ["v20", ""]>, DwarfRegAlias<B20>;
|
| /external/protobuf/python/google/protobuf/internal/ |
| D | more_messages.proto | 124 message B20 {} message
|
| /external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| D | device1.ini | 91 B20=0x00000000 key
|
| /external/OpenCSD/decoder/tests/snapshots/a57_single_step/ |
| D | device1.ini | 91 B20=0x00000000 key
|
| /external/llvm-project/llvm/test/Transforms/InstCombine/ |
| D | and-or-icmps.ll | 245 %B20 = and i16 %L7, %L2
249 %C7 = icmp slt i16 %B20, 0
|
| D | apint-shift.ll | 568 %B20 = shl i177 %L1, %B6
569 %B14 = sub i177 %B20, %B5
|
| /external/llvm-project/lld/test/COFF/ |
| D | combined-resources.test | 216 CHECK-NEXT: 0B20: 69742063 6F6E7461 696E7320 6D616E79 |it contains many|
|
| /external/icu/icu4c/source/data/unidata/ |
| D | confusablesWholeScript.txt | 2144 0B20 ; Orya; Beng; L # (ଠ) ORIYA LETTER TTHA
2160 0B20 ; Orya; Grek; L # (ଠ) ORIYA LETTER TTHA
2182 0B20 ; Orya; Hani; L # (ଠ) ORIYA LETTER TTHA
2195 0B20 ; Orya; Mlym; L # (ଠ) ORIYA LETTER TTHA
5042 0B20 ; Orya; Armn; A # (ଠ) ORIYA LETTER TTHA
5051 0B20 ; Orya; Beng; A # (ଠ) ORIYA LETTER TTHA
5060 0B20 ; Orya; Cyrl; A # (ଠ) ORIYA LETTER TTHA
5074 0B20 ; Orya; Grek; A # (ଠ) ORIYA LETTER TTHA
5096 0B20 ; Orya; Hani; A # (ଠ) ORIYA LETTER TTHA
5109 0B20 ; Orya; Latn; A # (ଠ) ORIYA LETTER TTHA
[all …]
|
| /external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/ |
| D | confusablesWholeScript.txt | 2144 0B20 ; Orya; Beng; L # (ଠ) ORIYA LETTER TTHA
2160 0B20 ; Orya; Grek; L # (ଠ) ORIYA LETTER TTHA
2182 0B20 ; Orya; Hani; L # (ଠ) ORIYA LETTER TTHA
2195 0B20 ; Orya; Mlym; L # (ଠ) ORIYA LETTER TTHA
5042 0B20 ; Orya; Armn; A # (ଠ) ORIYA LETTER TTHA
5051 0B20 ; Orya; Beng; A # (ଠ) ORIYA LETTER TTHA
5060 0B20 ; Orya; Cyrl; A # (ଠ) ORIYA LETTER TTHA
5074 0B20 ; Orya; Grek; A # (ଠ) ORIYA LETTER TTHA
5096 0B20 ; Orya; Hani; A # (ଠ) ORIYA LETTER TTHA
5109 0B20 ; Orya; Latn; A # (ଠ) ORIYA LETTER TTHA
[all …]
|