/external/igt-gpu-tools/tests/i915/ |
D | gem_exec_bad_domains.c | 162 BEGIN_BATCH(2, 1); 168 BEGIN_BATCH(2, 1); 176 BEGIN_BATCH(2, 1); 182 BEGIN_BATCH(2, 1); 192 BEGIN_BATCH(4, 2); 207 BEGIN_BATCH(2, 1); 214 BEGIN_BATCH(2, 1);
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D | gem_pipe_control_store_loop.c | 101 BEGIN_BATCH(4, 1); in store_pipe_control_loop() 113 BEGIN_BATCH(4, 1); in store_pipe_control_loop() 121 BEGIN_BATCH(4, 1); in store_pipe_control_loop() 130 BEGIN_BATCH(4, 1); in store_pipe_control_loop()
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D | gem_write_read_ring_switch.c | 108 BEGIN_BATCH(2, 0); in run_test() 117 BEGIN_BATCH(4, 1); in run_test() 124 BEGIN_BATCH(4, 1); in run_test()
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D | gem_unfence_active_buffers.c | 101 BEGIN_BATCH(3, 0); 153 BEGIN_BATCH(3, 0);
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D | gem_bad_batch.c | 47 BEGIN_BATCH(2, 0); in bad_batch()
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_misc_state.c | 61 BEGIN_BATCH(1); in upload_pipelined_state_pointers() 66 BEGIN_BATCH(7); in upload_pipelined_state_pointers() 292 BEGIN_BATCH(len); in brw_emit_depth_stencil_hiz() 487 BEGIN_BATCH(2); in brw_emit_select_pipeline() 504 BEGIN_BATCH(9); in brw_emit_select_pipeline() 552 BEGIN_BATCH(1); in brw_emit_select_pipeline() 558 BEGIN_BATCH(1); in brw_emit_select_pipeline() 577 BEGIN_BATCH(7); in brw_emit_select_pipeline() 707 BEGIN_BATCH(3); in brw_upload_invariant_state() 713 BEGIN_BATCH(2); in brw_upload_invariant_state() [all …]
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D | hsw_sol.c | 104 BEGIN_BATCH(9); in tally_prims_written() 127 BEGIN_BATCH(5); in tally_prims_written() 136 BEGIN_BATCH(9); in tally_prims_written() 173 BEGIN_BATCH(1 + 2 * BRW_MAX_XFB_STREAMS); in hsw_begin_transform_feedback() 208 BEGIN_BATCH(3); in hsw_pause_transform_feedback() 235 BEGIN_BATCH(3); in hsw_resume_transform_feedback()
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D | hsw_queryobj.c | 74 BEGIN_BATCH(1 + ARRAY_SIZE(maths)); in mult_gpr0_by_80() 99 BEGIN_BATCH(1 + ARRAY_SIZE(maths)); in keep_gpr0_lower_n_bits() 130 BEGIN_BATCH(batch_len); in shl_gpr0_by_30_bits() 178 BEGIN_BATCH(1 + ARRAY_SIZE(maths)); in gpr0_to_bool() 234 BEGIN_BATCH(1 + ARRAY_SIZE(maths)); in calc_overflow_for_stream() 317 BEGIN_BATCH(5); in hsw_result_to_gpr0() 394 BEGIN_BATCH(1); in set_predicate() 417 BEGIN_BATCH(dwords * cmd_size); in store_query_result_reg()
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D | intel_batchbuffer.c | 637 BEGIN_BATCH(2); in brw_finish_batch() 917 BEGIN_BATCH(1); in intel_batchbuffer_maybe_noop() 1105 BEGIN_BATCH(4 * size); in load_sized_register_mem() 1113 BEGIN_BATCH(3 * size); in load_sized_register_mem() 1153 BEGIN_BATCH(4); in brw_store_register_mem32() 1159 BEGIN_BATCH(3); in brw_store_register_mem32() 1182 BEGIN_BATCH(8); in brw_store_register_mem64() 1191 BEGIN_BATCH(6); in brw_store_register_mem64() 1210 BEGIN_BATCH(3); in brw_load_register_imm32() 1225 BEGIN_BATCH(5); in brw_load_register_imm64() [all …]
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D | brw_binding_tables.c | 88 BEGIN_BATCH(2); in brw_upload_binding_table() 251 BEGIN_BATCH(6); in gen4_upload_binding_table_pointers() 281 BEGIN_BATCH(4); in gen6_upload_binding_table_pointers()
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D | gen7_sol_state.c | 113 BEGIN_BATCH(3); in gen7_pause_transform_feedback() 140 BEGIN_BATCH(3); in gen7_resume_transform_feedback()
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D | brw_curbe.c | 168 BEGIN_BATCH(2); in brw_upload_cs_urb_state() 306 BEGIN_BATCH(2); in brw_upload_constant_buffer() 336 BEGIN_BATCH(2); in brw_upload_constant_buffer()
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D | brw_state_upload.c | 128 BEGIN_BATCH(2); in brw_upload_gen11_slice_hashing_state() 145 BEGIN_BATCH(2); in brw_upload_gen11_slice_hashing_state() 219 BEGIN_BATCH(5); in brw_upload_initial_gpu_state() 227 BEGIN_BATCH(2); in brw_upload_initial_gpu_state() 240 BEGIN_BATCH(3); in brw_upload_initial_gpu_state() 247 BEGIN_BATCH(3); in brw_upload_initial_gpu_state()
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D | gen6_sol.c | 418 BEGIN_BATCH(4); in brw_begin_transform_feedback() 430 BEGIN_BATCH(4); in brw_begin_transform_feedback() 500 BEGIN_BATCH(4); in brw_resume_transform_feedback() 512 BEGIN_BATCH(4); in brw_resume_transform_feedback()
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D | gen8_multisample_state.c | 36 BEGIN_BATCH(9); in gen8_emit_3dstate_sample_pattern()
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/external/mesa3d/src/gallium/drivers/i915/ |
D | i915_blit.c | 74 if (!BEGIN_BATCH(6)) { in i915_fill_blit() 76 assert(BEGIN_BATCH(6)); in i915_fill_blit() 146 if (!BEGIN_BATCH(8)) { in i915_copy_blit() 148 assert(BEGIN_BATCH(8)); in i915_copy_blit()
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D | i915_clear.c | 124 if (!BEGIN_BATCH(1 + 2*(7 + 7))) { in i915_clear_emit() 130 assert(BEGIN_BATCH(1 + 2*(7 + 7))); in i915_clear_emit() 175 if (!BEGIN_BATCH(1 + 7 + 7)) { in i915_clear_emit() 181 assert(BEGIN_BATCH(1 + 7 + 7)); in i915_clear_emit()
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D | i915_prim_vbuf.c | 468 if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) { in draw_arrays_fallback() 476 if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) { in draw_arrays_fallback() 516 if (!BEGIN_BATCH(2)) { in i915_vbuf_render_draw_arrays() 524 if (!BEGIN_BATCH(2)) { in i915_vbuf_render_draw_arrays() 636 if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) { in i915_vbuf_render_draw_elements() 644 if (!BEGIN_BATCH(1 + (nr_indices + 1)/2)) { in i915_vbuf_render_draw_elements()
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D | i915_prim_emit.c | 147 if (!BEGIN_BATCH( 1 + nr * vertex_size / 4)) { in emit_prim() 154 if (!BEGIN_BATCH( 1 + nr * vertex_size / 4)) { in emit_prim()
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
D | radeon_ioctl.c | 100 BEGIN_BATCH(6); in radeonEmitScissor() 111 BEGIN_BATCH(2); in radeonEmitScissor() 134 BEGIN_BATCH(8); in radeonEmitVbufPrim() 153 BEGIN_BATCH(4); in radeonEmitVbufPrim() 236 BEGIN_BATCH(2+ELTS_BUFSZ(align_min_nr)/4); in radeonAllocEltsOpenEnded() 246 BEGIN_BATCH(ELTS_BUFSZ(align_min_nr)/4); in radeonAllocEltsOpenEnded() 288 BEGIN_BATCH(7); in radeonEmitVertexAOS() 319 BEGIN_BATCH(sz+2+(nr * 2)); in radeonEmitAOS()
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D | radeon_blit.c | 84 BEGIN_BATCH(8); in emit_vtx_state() 125 BEGIN_BATCH(18); in emit_tx_setup() 200 BEGIN_BATCH(18); in emit_cb_setup() 288 BEGIN_BATCH(15); in emit_draw_packet()
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/external/mesa3d/src/mesa/drivers/dri/r200/ |
D | r200_blit.c | 87 BEGIN_BATCH(14); in emit_vtx_state() 154 BEGIN_BATCH(10); 178 BEGIN_BATCH(10); 208 BEGIN_BATCH(34); 281 BEGIN_BATCH(18); 349 BEGIN_BATCH(22); 439 BEGIN_BATCH(14);
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D | r200_cmdbuf.c | 130 BEGIN_BATCH(3); in r200EmitVbufPrim() 142 BEGIN_BATCH(8+2); in r200FireEB() 214 BEGIN_BATCH(2); in r200EmitMaxVtxIndex() 231 BEGIN_BATCH(7); in r200EmitVertexAOS() 250 BEGIN_BATCH(sz+2+ (nr*2)); in r200EmitAOS()
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/external/igt-gpu-tools/tools/ |
D | intel_perf_counters.c | 335 BEGIN_BATCH(6, 2); in gen5_get_counters() 383 BEGIN_BATCH(3, 1); in gen6_get_counters() 413 BEGIN_BATCH(3, 1); in gen7_get_counters()
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/external/igt-gpu-tools/lib/ |
D | intel_batchbuffer.h | 105 #define BEGIN_BATCH(n, r) do { \ macro 175 BEGIN_BATCH(8, 2); \ 184 BEGIN_BATCH(6, 1); \
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