| /external/llvm/test/CodeGen/AMDGPU/ |
| D | llvm.AMDGPU.bfe.i32.ll | 56 ; EG-NOT: BFE
66 ; EG-NOT: BFE
186 ; EG-NOT: BFE
198 ; EG-NOT: BFE
210 ; EG-NOT: BFE
222 ; EG-NOT: BFE
234 ; EG-NOT: BFE
246 ; EG-NOT: BFE
258 ; EG-NOT: BFE
270 ; EG-NOT: BFE
[all …]
|
| D | shift-and-i64-ubfe.ll | 3 ; Make sure 64-bit BFE pattern does a 32-bit BFE on the relevant half.
41 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1
43 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
57 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 1
59 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
89 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1{{$}}
105 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 2
107 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
121 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 30
123 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
[all …]
|
| D | llvm.AMDGPU.bfe.u32.ll | 46 ; EG-NOT: BFE
56 ; EG-NOT: BFE
334 ; EG-NOT: BFE
346 ; EG-NOT: BFE
358 ; EG-NOT: BFE
370 ; EG-NOT: BFE
382 ; EG-NOT: BFE
394 ; EG-NOT: BFE
406 ; EG-NOT: BFE
418 ; EG-NOT: BFE
[all …]
|
| D | sdiv.ll | 87 ; SI: v_bfe_i32 [[BFE:v[0-9]+]], v{{[0-9]+}}, 0, 8
88 ; SI: buffer_store_dword [[BFE]]
101 ; SI: v_bfe_i32 [[BFE:v[0-9]+]], v{{[0-9]+}}, 0, 23
102 ; SI: buffer_store_dword [[BFE]]
115 ; SI: v_bfe_i32 [[BFE:v[0-9]+]], v{{[0-9]+}}, 0, 24
116 ; SI: buffer_store_dword [[BFE]]
|
| D | sext-eliminate.ll | 8 ; EG-NOT: BFE
20 ; EG-NOT: BFE
|
| D | sext-in-reg-failure-r600.ll | 7 ; EG-NOT: BFE
|
| D | shift-i64-opts.ll | 58 ; GCN: v_bfe_u32 v[[BFE:[0-9]+]], v[[HI]], 8, 23
60 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
|
| D | sext-in-reg.ll | 239 ; EG-NOT: BFE
260 ; EG-NOT: BFE
485 ; Make sure there isn't a redundant BFE
582 ; Make sure we propagate the VALUness to users of a moved scalar BFE.
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | shift-and-i64-ubfe.ll | 4 ; Make sure 64-bit BFE pattern does a 32-bit BFE on the relevant half.
43 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1
45 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
59 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 1
61 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
93 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 1{{$}}
95 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO1]]{{\]}}
109 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 20, 2
111 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
125 ; GCN-DAG: v_bfe_u32 v[[BFE:[0-9]+]], [[VAL]], 1, 30
[all …]
|
| D | bfe-combine.ll | 6 ; VI: v_bfe_u32 v[[BFE:[0-9]+]], v{{[0-9]+}}, 8, 8
7 ; VI: v_lshlrev_b32_e32 v[[ADDRBASE:[0-9]+]], 2, v[[BFE]]
27 ; VI: v_bfe_u32 v[[BFE:[0-9]+]], v{{[0-9]+}}, 16, 16
28 ; VI: v_lshlrev_b32_e32 v[[ADDRBASE:[0-9]+]], {{[^,]+}}, v[[BFE]]
|
| D | sext-eliminate.ll | 8 ; EG-NOT: BFE
20 ; EG-NOT: BFE
|
| D | bfe-patterns.ll | 28 ; SI-NEXT: v_lshr_b32_e32 [[BFE:v[0-9]+]], [[SHL]], [[SUB]]
31 ; VI-NEXT: v_lshrrev_b32_e32 [[BFE:v[0-9]+]], [[SUB]], [[SHL]]
33 ; GCN: [[BFE]]
105 ; SI-NEXT: v_ashr_i32_e32 [[BFE:v[0-9]+]], [[SHL]], [[SUB]]
108 ; VI-NEXT: v_ashrrev_i32_e32 [[BFE:v[0-9]+]], [[SUB]], [[SHL]]
110 ; GCN: [[BFE]]
|
| D | sext-in-reg.ll | 262 ; EG-NOT: BFE
283 ; EG-NOT: BFE
460 ; Make sure we propagate the VALUness to users of a moved scalar BFE.
524 ; SI: s_bfe_i32 [[BFE:s[0-9]+]], [[VAL]], 0x10000
525 ; SI: v_mov_b32_e32 [[VBFE:v[0-9]+]], [[BFE]]
543 ; SI: s_bfe_i32 [[BFE:s[0-9]+]], [[VAL]], 0x20000
544 ; SI: v_mov_b32_e32 [[VBFE:v[0-9]+]], [[BFE]]
561 ; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[VAL]], 0, 1{{$}}
563 ; GCN: ds_write_b16 v{{[0-9]+}}, [[BFE]]
583 ; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[REG]], 0, 1{{$}}
[all …]
|
| D | sext-in-reg-failure-r600.ll | 5 ; EG-NOT: BFE
|
| D | sint_to_fp.f64.ll | 77 ; VI: s_bfe_i32 [[BFE:s[0-9]+]], [[VAL]], 0x80000
78 ; VI: s_sext_i32_i16 [[SEXT:s[0-9]+]], [[BFE]]
|
| D | llvm.amdgcn.ubfe.ll | 1039 ; EG-NOT: BFE
1065 ; EG-NOT: BFE
1091 ; EG-NOT: BFE
1117 ; EG-NOT: BFE
1143 ; EG-NOT: BFE
1169 ; EG-NOT: BFE
1195 ; EG-NOT: BFE
1221 ; EG-NOT: BFE
1247 ; EG-NOT: BFE
1273 ; EG-NOT: BFE
[all …]
|
| D | llvm.amdgcn.sbfe.ll | 384 ; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[LOAD]], 0, 24
385 ; GCN: buffer_store_dword [[BFE]],
397 ; GCN: v_bfe_i32 [[BFE:v[0-9]+]], [[LOAD]], 1, 16
398 ; GCN: v_lshrrev_b32_e32 [[TMP0:v[0-9]+]], 31, [[BFE]]
399 ; GCN: v_add_{{[iu]}}32_e32 [[TMP1:v[0-9]+]], vcc, [[TMP0]], [[BFE]]
456 ; Make sure there isn't a redundant BFE
|
| D | cgp-bitfield-extract.ll | 123 ; VI: s_bfe_u32 [[BFE:s[0-9]+]], [[ARG]], 0xc0004
157 ; 32-bit BFE on one half of the integer.
|
| D | shift-i64-opts.ll | 59 ; GCN: v_bfe_u32 v[[BFE:[0-9]+]], v[[LO]], 8, 23
60 ; GCN: buffer_store_dwordx2 v{{\[}}[[BFE]]:[[ZERO]]{{\]}}
|
| /external/llvm-project/clang/lib/Basic/ |
| D | FileManager.cpp | 438 FileEntry &BFE = *BypassFileEntries.back(); in getBypassFile() local
439 Insertion.first->second = FileEntryRef::MapValue(BFE, VF.getDir()); in getBypassFile()
440 BFE.LastRef = FileEntryRef(*Insertion.first); in getBypassFile()
441 BFE.Size = Status.getSize(); in getBypassFile()
442 BFE.Dir = VFE.Dir; in getBypassFile()
443 BFE.ModTime = llvm::sys::toTimeT(Status.getLastModificationTime()); in getBypassFile()
444 BFE.UID = NextFileUID++; in getBypassFile()
445 BFE.IsValid = true; in getBypassFile()
|
| /external/llvm-project/llvm/test/Transforms/InstCombine/AMDGPU/ |
| D | amdgcn-intrinsics.ll | 1042 ; CHECK-NEXT: [[BFE:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[SRC:%.*]], i32 [[OFFSET:%.*]], …
1043 ; CHECK-NEXT: ret i32 [[BFE]]
1051 ; CHECK-NEXT: [[BFE:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[SRC:%.*]], i32 5, i32 [[WIDTH:%…
1052 ; CHECK-NEXT: ret i32 [[BFE]]
1060 ; CHECK-NEXT: [[BFE:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[SRC:%.*]], i32 [[OFFSET:%.*]], …
1061 ; CHECK-NEXT: ret i32 [[BFE]]
1077 ; CHECK-NEXT: [[BFE:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[SRC:%.*]], i32 [[OFFSET:%.*]], …
1078 ; CHECK-NEXT: ret i32 [[BFE]]
1094 ; CHECK-NEXT: [[BFE:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[SRC:%.*]], i32 [[OFFSET:%.*]], …
1095 ; CHECK-NEXT: ret i32 [[BFE]]
[all …]
|
| /external/mesa3d/docs/relnotes/ |
| D | 17.0.4.rst | 77 - nvc0/ir: fix LSB/BFE/BFI implementations
|
| D | 13.0.1.rst | 139 - radeonsi: fix BFE/BFI lowering for GLSL semantics
|
| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4.h | 214 EMIT3(BFE)
|
| /external/igt-gpu-tools/assembler/ |
| D | lex.l | 104 "bfe" { yylval.integer = BRW_OPCODE_BFE; return BFE; }
|