| /external/llvm-project/llvm/test/CodeGen/Mips/longbranch/ |
| D | branch-limits-int.mir | 262 BGEZ killed renamable $at, %bb.2, implicit-def $at
510 ; MIPS: BGEZ $at, %bb.2, implicit-def $at {
529 ; PIC: BGEZ $at, %bb.3, implicit-def $at {
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEInstrInfo.cpp | 413 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc()
414 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc()
510 Opc == Mips::BGEZ || Opc == Mips::BLTZ || Opc == Mips::BLEZ || in getAnalyzableBrOpc()
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| D | MipsInstrInfo.cpp | 323 case Mips::BGEZ: in getEquivalentCompactForm()
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| D | MipsInstrInfo.td | 1866 def BGEZ : MMRel, CBranchZero<"bgez", brtarget, setge, GPR32Opnd>,
2596 (BGEZ i32:$lhs, bb:$dst)>;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 291 case Mips::BGEZ: case Mips::BGEZ64: in isBranchOffsetInRange()
502 case Mips::BGEZ: in getEquivalentCompactForm()
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| D | MipsSEInstrInfo.cpp | 496 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc()
497 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc()
647 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
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| D | MipsScheduleP5600.td | 71 def : InstRW<[P5600WriteJump], (instrs B, BAL, BAL_BR, BEQ, BEQL, BGEZ, BGEZAL,
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| D | MipsScheduleGeneric.td | 286 def : InstRW<[GenericWriteJump], (instrs B, BAL, BAL_BR, BEQ, BNE, BGTZ, BGEZ,
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| D | MipsInstrInfo.td | 2227 def BGEZ : MMRel, CBranchZero<"bgez", brtarget, setge, GPR32Opnd>,
3237 (BGEZ i32:$lhs, bb:$dst)>, ISA_MIPS1;
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsInstrInfo.cpp | 292 case Mips::BGEZ: case Mips::BGEZ64: in isBranchOffsetInRange()
503 case Mips::BGEZ: in getEquivalentCompactForm()
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| D | MipsSEInstrInfo.cpp | 510 case Mips::BGEZ: return Mips::BLTZ; in getOppositeBranchOpc()
511 case Mips::BLTZ: return Mips::BGEZ; in getOppositeBranchOpc()
661 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
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| D | MipsScheduleP5600.td | 72 def : InstRW<[P5600WriteJump], (instrs B, BAL, BAL_BR, BEQ, BEQL, BGEZ, BGEZAL,
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| D | MipsScheduleGeneric.td | 286 def : InstRW<[GenericWriteJump], (instrs B, BAL, BAL_BR, BEQ, BNE, BGTZ, BGEZ,
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| D | MipsInstrInfo.td | 2228 def BGEZ : MMRel, CBranchZero<"bgez", brtarget, setge, GPR32Opnd>,
3282 (BGEZ i32:$lhs, bb:$dst)>, ISA_MIPS1;
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_common.c | 146 #define BGEZ (HI(1) | (1 << 16)) macro
1985 inst = BGEZ; in sljit_emit_cmp()
1999 inst = BGEZ; in sljit_emit_cmp()
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| D | sljitNativeMIPS_32.c | 150 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS)); in emit_single_op()
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| D | sljitNativeMIPS_64.c | 241 FAIL_IF(push_inst(compiler, BGEZ | S(TMP_REG1) | IMM(-2), UNMOVABLE_INS)); in emit_single_op()
|
| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1545 case Mips::BGEZ: in processInstruction()
2857 ZeroSrcOpcode = Mips::BGEZ; in expandCondBranches()
2869 ZeroTrgOpcode = Mips::BGEZ; in expandCondBranches()
2904 TOut.emitRX(Mips::BGEZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
3678 TOut.emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, STI); in expandAbs()
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| /external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1909 case Mips::BGEZ: in processInstruction()
3995 ZeroSrcOpcode = Mips::BGEZ; in expandCondBranches()
4008 ZeroTrgOpcode = Mips::BGEZ; in expandCondBranches()
4044 TOut.emitRX(Mips::BGEZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
5144 TOut.emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, STI); in expandAbs()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 1893 case Mips::BGEZ: in processInstruction()
3967 ZeroSrcOpcode = Mips::BGEZ; in expandCondBranches()
3980 ZeroTrgOpcode = Mips::BGEZ; in expandCondBranches()
4016 TOut.emitRX(Mips::BGEZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
5034 TOut.emitRI(Mips::BGEZ, SecondRegOp, 8, IDLoc, STI); in expandAbs()
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 234 25500U, // BGEZ
2023 0U, // BGEZ
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| D | MipsGenDisassemblerTables.inc | 838 /* 975 */ MCD_OPC_Decode, 217, 1, 73, // Opcode: BGEZ
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 830 UINT64_C(67174400), // BGEZ
5928 case Mips::BGEZ:
10292 CEFBS_HasStdEnc_NotInMicroMips, // BGEZ = 817
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| D | MipsGenAsmWriter.inc | 2058 26212U, // BGEZ
4812 0U, // BGEZ
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| D | MipsGenInstrInfo.inc | 832 BGEZ = 817,
5678 …D::Terminator), 0x12ULL, nullptr, ImplicitList2, OperandInfo99, -1 ,nullptr }, // Inst #817 = BGEZ
16697 { Mips::BGEZ, Mips::BGEZ, Mips::BGEZ_MM },
|