/external/llvm-project/llvm/test/CodeGen/Mips/longbranch/ |
D | branch-limits-int.mir | 361 BGTZ killed renamable $at, %bb.2, implicit-def $at 411 ; MIPS: BGTZ $at, %bb.2, implicit-def $at { 430 ; PIC: BGTZ $at, %bb.3, implicit-def $at {
|
/external/llvm/lib/Target/Mips/ |
D | MipsSEInstrInfo.cpp | 412 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc() 415 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc() 509 return (Opc == Mips::BEQ || Opc == Mips::BNE || Opc == Mips::BGTZ || in getAnalyzableBrOpc()
|
D | MipsInstrInfo.cpp | 325 case Mips::BGTZ: in getEquivalentCompactForm()
|
D | MipsFastISel.cpp | 929 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
|
D | MipsInstrInfo.td | 1870 def BGTZ : MMRel, CBranchZero<"bgtz", brtarget, setgt, GPR32Opnd>,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 295 case Mips::BGTZ: case Mips::BGTZ64: in isBranchOffsetInRange() 504 case Mips::BGTZ: in getEquivalentCompactForm()
|
D | MipsSEInstrInfo.cpp | 495 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc() 498 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc() 647 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
|
D | MipsScheduleP5600.td | 72 BGEZALL, BGEZL, BGTZ, BGTZL, BLEZ, BLEZL, BLTZ,
|
D | MipsFastISel.cpp | 979 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
|
D | MipsScheduleGeneric.td | 286 def : InstRW<[GenericWriteJump], (instrs B, BAL, BAL_BR, BEQ, BNE, BGTZ, BGEZ,
|
/external/llvm-project/llvm/lib/Target/Mips/ |
D | MipsInstrInfo.cpp | 296 case Mips::BGTZ: case Mips::BGTZ64: in isBranchOffsetInRange() 505 case Mips::BGTZ: in getEquivalentCompactForm()
|
D | MipsSEInstrInfo.cpp | 509 case Mips::BGTZ: return Mips::BLEZ; in getOppositeBranchOpc() 512 case Mips::BLEZ: return Mips::BGTZ; in getOppositeBranchOpc() 661 Opc == Mips::BNE_MM || Opc == Mips::BGTZ || Opc == Mips::BGEZ || in getAnalyzableBrOpc()
|
D | MipsScheduleP5600.td | 73 BGEZALL, BGEZL, BGTZ, BGTZL, BLEZ, BLEZL, BLTZ,
|
D | MipsFastISel.cpp | 977 BuildMI(*BrBB, FuncInfo.InsertPt, DbgLoc, TII.get(Mips::BGTZ)) in selectBranch()
|
D | MipsScheduleGeneric.td | 286 def : InstRW<[GenericWriteJump], (instrs B, BAL, BAL_BR, BEQ, BNE, BGTZ, BGEZ,
|
/external/pcre/dist2/src/sljit/ |
D | sljitNativeMIPS_common.c | 147 #define BGTZ (HI(7)) macro 1981 inst = BGTZ; in sljit_emit_cmp() 2011 inst = BGTZ; in sljit_emit_cmp()
|
/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1546 case Mips::BGTZ: in processInstruction() 2846 ZeroSrcOpcode = Mips::BGTZ; in expandCondBranches() 2880 ZeroTrgOpcode = Mips::BGTZ; in expandCondBranches() 2910 TOut.emitRX(Mips::BGTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
|
/external/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1910 case Mips::BGTZ: in processInstruction() 3983 ZeroSrcOpcode = Mips::BGTZ; in expandCondBranches() 4020 ZeroTrgOpcode = Mips::BGTZ; in expandCondBranches() 4050 TOut.emitRX(Mips::BGTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 1894 case Mips::BGTZ: in processInstruction() 3955 ZeroSrcOpcode = Mips::BGTZ; in expandCondBranches() 3992 ZeroTrgOpcode = Mips::BGTZ; in expandCondBranches() 4022 TOut.emitRX(Mips::BGTZ, Mips::ZERO, MCOperand::createExpr(OffsetExpr), in expandCondBranches()
|
/external/llvm/lib/Target/Mips/Disassembler/ |
D | MipsDisassembler.cpp | 837 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
|
/external/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
D | MipsDisassembler.cpp | 994 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/ |
D | MipsDisassembler.cpp | 994 MI.setOpcode(Mips::BGTZ); in DecodeBgtzGroupBranch()
|
/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 244 25560U, // BGTZ 2033 0U, // BGTZ
|
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
D | MipsGenMCCodeEmitter.inc | 843 UINT64_C(469762048), // BGTZ 5933 case Mips::BGTZ: 10305 CEFBS_HasStdEnc_NotInMicroMips, // BGTZ = 830
|
D | MipsGenAsmWriter.inc | 2071 26272U, // BGTZ 4825 0U, // BGTZ
|