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Searched refs:BRW_CHANNEL_Y (Results 1 – 12 of 12) sorted by relevance

/external/igt-gpu-tools/assembler/
Dgen8_disasm.c513 swz_y == BRW_CHANNEL_Y && in src_da16()
564 swz_y == BRW_CHANNEL_Y &&
617 swz_y == BRW_CHANNEL_Y &&
669 swz_y == BRW_CHANNEL_Y &&
Dlex.l69 yylval.integer = BRW_CHANNEL_Y;
271 yylval.integer = BRW_CHANNEL_Y;
Dgen8_instruction.c212 BRW_CHANNEL_Y)); in gen8_set_src0()
300 BRW_CHANNEL_Y)); in gen8_set_src1()
Dbrw_disasm.c682 swz_y == BRW_CHANNEL_Y && in src_da16()
731 swz_y == BRW_CHANNEL_Y && in src0_3src()
783 swz_y == BRW_CHANNEL_Y && in src1_3src()
834 swz_y == BRW_CHANNEL_Y && in src2_3src()
Dbrw_defines.h555 #define BRW_CHANNEL_Y 1 macro
Dbrw_eu_emit.c334 insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); in brw_set_src0()
421 insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); in brw_set_src1()
Dgram.y2825 | Y { $$ = 1 << BRW_CHANNEL_Y; }
/external/mesa3d/src/intel/tools/
Di965_lex.l207 <DOTSEL>"y" { yylval.integer = BRW_CHANNEL_Y; return Y; }
246 <CHANNEL>"y" { yylval.integer = BRW_CHANNEL_Y; return Y; }
Di965_gram.y2129 | Y { $$ = 1 << BRW_CHANNEL_Y; }
/external/mesa3d/src/intel/compiler/
Dbrw_eu_defines.h104 #define BRW_CHANNEL_Y 1 macro
Dbrw_eu_emit.c313 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y)); in brw_set_src0()
420 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y)); in brw_set_src1()
Dbrw_disasm.c956 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y); in src_swizzle()