/external/mesa3d/src/intel/compiler/ |
D | brw_vec4_cmod_propagation.cpp | 206 src0_chan = BRW_GET_SWZ(scan_inst->src[0].swizzle, 0); in opt_cmod_propagation_local() 207 src1_chan = BRW_GET_SWZ(scan_inst->src[1].swizzle, 0); in opt_cmod_propagation_local() 210 src0_chan = BRW_GET_SWZ(scan_inst->src[0].swizzle, 1); in opt_cmod_propagation_local() 211 src1_chan = BRW_GET_SWZ(scan_inst->src[1].swizzle, 1); in opt_cmod_propagation_local() 214 src0_chan = BRW_GET_SWZ(scan_inst->src[0].swizzle, 2); in opt_cmod_propagation_local() 215 src1_chan = BRW_GET_SWZ(scan_inst->src[1].swizzle, 2); in opt_cmod_propagation_local() 218 src0_chan = BRW_GET_SWZ(scan_inst->src[0].swizzle, 3); in opt_cmod_propagation_local() 219 src1_chan = BRW_GET_SWZ(scan_inst->src[1].swizzle, 3); in opt_cmod_propagation_local()
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D | brw_reg.h | 76 #define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) macro 118 BRW_GET_SWZ(swz1, BRW_GET_SWZ(swz0, 0)), in brw_compose_swizzle() 119 BRW_GET_SWZ(swz1, BRW_GET_SWZ(swz0, 1)), in brw_compose_swizzle() 120 BRW_GET_SWZ(swz1, BRW_GET_SWZ(swz0, 2)), in brw_compose_swizzle() 121 BRW_GET_SWZ(swz1, BRW_GET_SWZ(swz0, 3))); in brw_compose_swizzle() 134 if (mask & (1 << BRW_GET_SWZ(swz, i))) in brw_apply_swizzle_to_mask() 153 result |= 1 << BRW_GET_SWZ(swz, i); in brw_apply_inv_swizzle_to_mask()
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D | brw_vec4.cpp | 686 unsigned channel = BRW_GET_SWZ(inst->src[i].swizzle, c) + 1; in pack_uniform_registers() 1204 src[i] = brw_imm_vf4(imm[BRW_GET_SWZ(swizzle, 0)], in reswizzle() 1205 imm[BRW_GET_SWZ(swizzle, 1)], in reswizzle() 1206 imm[BRW_GET_SWZ(swizzle, 2)], in reswizzle() 1207 imm[BRW_GET_SWZ(swizzle, 3)]); in reswizzle() 1258 if (BRW_GET_SWZ(inst->src[0].swizzle, c) != c) { in opt_register_coalesce() 1762 fprintf(file, "%s", chans[BRW_GET_SWZ(inst->src[i].swizzle, c)]); in dump_instruction() 2105 inst->src[i].subnr += 4 * BRW_GET_SWZ(inst->src[i].swizzle, 0); in convert_to_hw_regs() 2488 unsigned swz = BRW_GET_SWZ(inst->src[i].swizzle, chan); in scalarize_df() 2599 unsigned swizzle0 = BRW_GET_SWZ(reg.swizzle, 0); in apply_logical_swizzle() [all …]
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D | brw_vec4_live_variables.h | 119 (BRW_GET_SWZ(reg.swizzle, c) + k / csize * 4) * csize + k % csize;
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D | brw_vec4_copy_propagation.cpp | 78 inst->dst.writemask & (1 << BRW_GET_SWZ(src->swizzle, ch))); in is_channel_updated() 100 swz[i] = BRW_GET_SWZ(src.swizzle, i); in get_copy_value()
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D | brw_vec4_generator.cpp | 1441 indirect.subnr = (indirect.subnr * 4 + BRW_GET_SWZ(indirect.swizzle, 0)); in generate_mov_indirect() 1453 uint32_t uv_swiz = BRW_GET_SWZ(reg.swizzle, 0) << 2 | in generate_mov_indirect() 1454 BRW_GET_SWZ(reg.swizzle, 1) << 6 | in generate_mov_indirect() 1455 BRW_GET_SWZ(reg.swizzle, 2) << 10 | in generate_mov_indirect() 1456 BRW_GET_SWZ(reg.swizzle, 3) << 14; in generate_mov_indirect()
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D | brw_eu_emit.c | 311 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X)); in brw_set_src0() 313 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y)); in brw_set_src0() 315 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Z)); in brw_set_src0() 317 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_W)); in brw_set_src0() 418 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X)); in brw_set_src1() 420 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Y)); in brw_set_src1() 422 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_Z)); in brw_set_src1() 424 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_W)); in brw_set_src1() 2828 BRW_GET_SWZ(surface.swizzle, 0)), in brw_send_indirect_surface_message()
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D | brw_disasm.c | 955 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X); in src_swizzle() 956 unsigned y = BRW_GET_SWZ(swiz, BRW_CHANNEL_Y); in src_swizzle() 957 unsigned z = BRW_GET_SWZ(swiz, BRW_CHANNEL_Z); in src_swizzle() 958 unsigned w = BRW_GET_SWZ(swiz, BRW_CHANNEL_W); in src_swizzle()
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D | brw_eu.cpp | 121 y |= x >> imm_shift(type, (i & ~3) + BRW_GET_SWZ(swz, i & 3)) in brw_swizzle_immediate()
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D | brw_fs_generator.cpp | 766 const struct brw_reg src_0 = suboffset(src, BRW_GET_SWZ(swiz, 0)); in generate_quad_swizzle() 795 stride(suboffset(src, BRW_GET_SWZ(swiz, c)), 4, 1, 0)); in generate_quad_swizzle()
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/external/igt-gpu-tools/assembler/ |
D | gen8_instruction.c | 208 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0() 211 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0() 214 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0() 217 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src0() 296 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1() 299 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1() 302 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1() 305 BRW_GET_SWZ(reg.dw1.bits.swizzle, in gen8_set_src1()
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D | brw_reg.h | 71 #define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) macro 669 reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), in brw_swizzle() 670 BRW_GET_SWZ(reg.dw1.bits.swizzle, y), in brw_swizzle() 671 BRW_GET_SWZ(reg.dw1.bits.swizzle, z), in brw_swizzle() 672 BRW_GET_SWZ(reg.dw1.bits.swizzle, w)); in brw_swizzle()
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D | brw_eu_emit.c | 333 insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); in brw_set_src0() 334 insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); in brw_set_src0() 335 insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); in brw_set_src0() 336 insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); in brw_set_src0() 420 insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); in brw_set_src1() 421 insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); in brw_set_src1() 422 insn->bits3.da16.src1_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); in brw_set_src1() 423 insn->bits3.da16.src1_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); in brw_set_src1() 810 return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0); in get_3src_subreg_nr()
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