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Searched refs:BRW_MRF_COMPR4 (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_ir_vec4.h248 if (r.file == MRF && (r.nr & BRW_MRF_COMPR4)) { in regions_overlap()
253 t0.nr &= ~BRW_MRF_COMPR4; in regions_overlap()
259 } else if (s.file == MRF && (s.nr & BRW_MRF_COMPR4)) { in regions_overlap()
Dbrw_ir_fs.h210 if (r.file == MRF && (r.nr & BRW_MRF_COMPR4)) { in regions_overlap()
212 t.nr &= ~BRW_MRF_COMPR4; in regions_overlap()
219 } else if (s.file == MRF && (s.nr & BRW_MRF_COMPR4)) { in regions_overlap()
Dbrw_schedule_instructions.cpp1177 int reg = inst->dst.nr & ~BRW_MRF_COMPR4; in calculate_deps()
1182 if (inst->dst.nr & BRW_MRF_COMPR4) in calculate_deps()
1301 int reg = inst->dst.nr & ~BRW_MRF_COMPR4; in calculate_deps()
1306 if (inst->dst.nr & BRW_MRF_COMPR4) in calculate_deps()
Dbrw_fs_reg_allocate.cpp531 int reg = inst->dst.nr & ~BRW_MRF_COMPR4; in get_used_mrfs()
534 if (inst->dst.nr & BRW_MRF_COMPR4) { in get_used_mrfs()
Dbrw_eu_defines.h1007 #define BRW_MRF_COMPR4 (1 << 7) macro
Dbrw_disasm.c693 _reg_nr &= ~BRW_MRF_COMPR4; in reg()
2148 brw_inst_dst_da_reg_nr(devinfo, inst) & BRW_MRF_COMPR4) { in brw_disassemble_inst()
Dbrw_ir_performance.cpp1192 const unsigned i = (r.nr & ~BRW_MRF_COMPR4) + in reg_dependency_id()
Dbrw_fs.cpp3218 if (inst->dst.nr & BRW_MRF_COMPR4) { in compute_to_mrf()
3229 scan_inst->dst.nr &= ~BRW_MRF_COMPR4; in compute_to_mrf()
3756 dst.nr = dst.nr & ~BRW_MRF_COMPR4; in lower_load_payload()
3778 if (inst->dst.file == MRF && (inst->dst.nr & BRW_MRF_COMPR4) && in lower_load_payload()
3802 compr4_dst.nr |= BRW_MRF_COMPR4; in lower_load_payload()
4603 load->dst.nr |= BRW_MRF_COMPR4; in lower_fb_write_logical_send()
Dbrw_eu_emit.c94 assert((dest.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); in brw_set_dest()
214 assert((reg.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); in brw_set_src0()
Dbrw_vec4.cpp2122 assert((reg.nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); in convert_to_hw_regs()
Dbrw_fs_generator.cpp64 assert((reg->nr & ~BRW_MRF_COMPR4) < BRW_MAX_MRF(devinfo->gen)); in brw_reg_from_fs_reg()
/external/igt-gpu-tools/assembler/
Dbrw_defines.h807 #define BRW_MRF_COMPR4 (1 << 7) macro
/external/mesa3d/src/intel/tools/
Di965_gram.y309 reg->nr |= BRW_MRF_COMPR4; in i965_asm_set_dst_nr()