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Searched refs:BRW_OPCODE_CSEL (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_eu.cpp626 { BRW_OPCODE_CSEL, 18, "csel", 3, 1, GEN_GE(GEN8) & GEN_LT(GEN12) },
627 { BRW_OPCODE_CSEL, 114, "csel", 3, 1, GEN_GE(GEN12) },
Dbrw_ir_vec4.h335 opcode != BRW_OPCODE_CSEL && in writes_flag()
Dbrw_fs_lower_regioning.cpp239 inst->opcode == BRW_OPCODE_CSEL || in has_inconsistent_cmod()
Dbrw_eu_defines.h219 BRW_OPCODE_CSEL, /**< Gen8+ */ enumerator
Dbrw_fs_builder.h659 emit(BRW_OPCODE_CSEL, in CSEL()
Dbrw_shader.cpp959 case BRW_OPCODE_CSEL: in can_do_saturate()
Dbrw_ir_performance.cpp414 case BRW_OPCODE_CSEL: in instruction_desc()
Dbrw_disasm.c1735 opcode != BRW_OPCODE_CSEL && in brw_disassemble_inst()
Dbrw_vec4.cpp1612 inst->opcode != BRW_OPCODE_CSEL && in dump_instruction()
Dbrw_fs_generator.cpp2120 case BRW_OPCODE_CSEL: in generate_code()
Dbrw_fs.cpp1117 opcode != BRW_OPCODE_CSEL && in flags_written()
6525 case BRW_OPCODE_CSEL: in get_lowered_simd_width()
7230 inst->opcode != BRW_OPCODE_CSEL && in dump_instruction()
/external/mesa3d/src/intel/tools/
Di965_lex.l71 csel { yylval.integer = BRW_OPCODE_CSEL; return CSEL; }
Di965_gram.y260 case BRW_OPCODE_CSEL: in i965_asm_ternary_instruction()