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Searched refs:BRW_OPCODE_HALT (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/intel/tools/
Di965_asm.c160 case BRW_OPCODE_HALT: in i965_postprocess_labels()
186 case BRW_OPCODE_HALT: in i965_postprocess_labels()
Di965_lex.l87 halt { yylval.integer = BRW_OPCODE_HALT; return HALT; }
/external/igt-gpu-tools/assembler/
Dbrw_eu_compact.c461 src->header.opcode == BRW_OPCODE_HALT || in brw_try_compact_instruction()
752 case BRW_OPCODE_HALT: in brw_compact_instructions()
Dlex.l144 "halt" { yylval.integer = BRW_OPCODE_HALT; return HALT; }
Dbrw_eu_emit.c1545 insn = next_insn(p, BRW_OPCODE_HALT); in gen6_HALT()
2397 case BRW_OPCODE_HALT: in brw_find_next_block_end()
2455 insn->header.opcode != BRW_OPCODE_HALT); in brw_set_uip_jip()
2486 case BRW_OPCODE_HALT: in brw_set_uip_jip()
Dbrw_disasm.c80 [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 },
1126 inst->header.opcode == BRW_OPCODE_HALT)) || in brw_disasm()
Dbrw_defines.h667 BRW_OPCODE_HALT = 42, enumerator
Dgen8_disasm.c907 opcode == BRW_OPCODE_HALT) { in gen8_disassemble()
/external/mesa3d/src/intel/compiler/
Dbrw_disasm.c47 opcode == BRW_OPCODE_HALT; in brw_has_jip()
60 opcode == BRW_OPCODE_HALT; in brw_has_uip()
1783 opcode == BRW_OPCODE_HALT || in brw_disassemble_inst()
Dbrw_eu_defines.h238 BRW_OPCODE_HALT, enumerator
Dbrw_eu.cpp650 { BRW_OPCODE_HALT, 42, "halt", 0, 0, GEN_ALL },
Dbrw_eu_emit.c1777 insn = next_insn(p, BRW_OPCODE_HALT); in brw_HALT()
2883 case BRW_OPCODE_HALT: in brw_find_next_block_end()
2973 case BRW_OPCODE_HALT: in brw_set_uip_jip()
Dbrw_eu_compact.c2361 case BRW_OPCODE_HALT: in brw_compact_instructions()
Dbrw_fs_generator.cpp254 assert(brw_inst_opcode(p->devinfo, patch) == BRW_OPCODE_HALT); in patch_discard_jumps_to_fb_writes()