Searched refs:BRW_OPCODE_ROR (Results 1 – 8 of 8) sorted by relevance
| /external/mesa3d/src/intel/compiler/ |
| D | brw_eu.cpp | 618 { BRW_OPCODE_ROR, 14, "ror", 2, 1, GEN11 },
619 { BRW_OPCODE_ROR, 110, "ror", 2, 1, GEN_GE(GEN12) },
|
| D | brw_eu_defines.h | 215 BRW_OPCODE_ROR, /**< Gen11+ */ enumerator
|
| D | brw_shader.cpp | 941 case BRW_OPCODE_ROR: in can_do_source_mods()
|
| D | brw_ir_performance.cpp | 322 case BRW_OPCODE_ROR: in instruction_desc()
|
| D | brw_fs_generator.cpp | 2091 case BRW_OPCODE_ROR: in generate_code()
|
| D | brw_fs.cpp | 6522 case BRW_OPCODE_ROR: in get_lowered_simd_width()
|
| /external/mesa3d/src/intel/tools/ |
| D | i965_lex.l | 117 ror { yylval.integer = BRW_OPCODE_ROR; return ROR; }
|
| D | i965_gram.y | 195 case BRW_OPCODE_ROR: in i965_asm_binary_instruction()
|