Home
last modified time | relevance | path

Searched refs:BRW_OPCODE_SENDC (Results 1 – 16 of 16) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dtest_eu_compact.cpp71 brw_inst_opcode(devinfo, inst) != BRW_OPCODE_SENDC && in clear_pad_bits()
134 brw_inst_opcode(devinfo, src) != BRW_OPCODE_SENDC && in skip_bit()
Dbrw_eu_defines.h250 BRW_OPCODE_SENDC, enumerator
1182 opcode == BRW_OPCODE_SENDC || in tgl_swsb_decode()
Dbrw_eu.cpp662 { BRW_OPCODE_SENDC, 50, "sendc", 1, 1, GEN_LT(GEN12) },
664 { BRW_OPCODE_SENDC, 50, "sendc", 2, 1, GEN_GE(GEN12) },
Dbrw_eu_emit.c114 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC)) { in brw_set_dest()
222 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC || in brw_set_src0()
236 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC)) { in brw_set_src0()
356 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC))) { in brw_set_src1()
460 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDC); in brw_set_desc_ex()
2416 insn = next_insn(p, BRW_OPCODE_SENDC); in brw_fb_WRITE()
2462 brw_inst *insn = next_insn(p, BRW_OPCODE_SENDC); in gen9_fb_READ()
Dbrw_fs_generator.cpp345 devinfo->gen >= 12 ? BRW_OPCODE_SENDC : BRW_OPCODE_SENDSC); in generate_send()
350 brw_inst_set_opcode(p->devinfo, brw_last_inst, BRW_OPCODE_SENDC); in generate_send()
2392 BRW_OPCODE_SENDC : BRW_OPCODE_SEND; in generate_code()
Dbrw_eu_validate.c97 case BRW_OPCODE_SENDC: in inst_is_send()
Dbrw_disasm.c87 opcode == BRW_OPCODE_SENDC || in is_send()
Dbrw_eu_compact.c1298 if ((brw_inst_opcode(devinfo, src) == BRW_OPCODE_SENDC || in has_unmapped_bits()
/external/mesa3d/src/intel/common/
Dgen_disasm.c35 opcode == BRW_OPCODE_SENDC || in is_send()
/external/igt-gpu-tools/assembler/
Dgen8_disasm.c863 } else if (opcode != BRW_OPCODE_SEND && opcode != BRW_OPCODE_SENDC) { in gen8_disassemble()
921 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) { in gen8_disassemble()
979 if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC) in gen8_disassemble()
Dbrw_disasm.c71 [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
1072 inst->header.opcode != BRW_OPCODE_SENDC) { in brw_disasm()
1144 inst->header.opcode == BRW_OPCODE_SENDC) { in brw_disasm()
1338 inst->header.opcode == BRW_OPCODE_SENDC) in brw_disasm()
Dlex.l135 "sendc" { yylval.integer = BRW_OPCODE_SENDC; return SENDC; }
Dbrw_eu_compact.c718 src->header.opcode == BRW_OPCODE_SENDC) && in brw_compact_instructions()
Dbrw_defines.h676 BRW_OPCODE_SENDC = 50, enumerator
Dbrw_eu_emit.c259 insn->header.opcode == BRW_OPCODE_SENDC)) { in brw_set_src0()
2153 insn = next_insn(p, BRW_OPCODE_SENDC); in brw_fb_WRITE()
/external/mesa3d/src/intel/tools/
Di965_lex.l122 sendc { yylval.integer = BRW_OPCODE_SENDC; return SENDC; }