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Searched refs:BRW_SWIZZLE_XXXX (Results 1 – 16 of 16) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dtest_vec4_dead_code_eliminate.cpp142 test_cmp->src[1].swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
148 test_mov->src[0].swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
Dbrw_vec4_surface_builder.cpp197 swizzle(src0, BRW_SWIZZLE_XXXX)); in emit_untyped_atomic()
202 swizzle(src1, BRW_SWIZZLE_XXXX)); in emit_untyped_atomic()
Dtest_vec4_cmod_propagation.cpp670 src0.swizzle = src1.swizzle = src2.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
674 tmp.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
712 src0.swizzle = src1.swizzle = src2.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
716 tmp.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
753 src0.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
757 mov_src.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
Dbrw_reg.h80 #define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0) macro
103 return (swiz == BRW_SWIZZLE_XXXX || in brw_is_single_value_swizzle()
531 BRW_SWIZZLE_XXXX, in brw_vec1_reg()
882 BRW_SWIZZLE_XXXX, in brw_notification_reg()
Dtest_vec4_register_coalesce.cpp162 src.swizzle = BRW_SWIZZLE_XXXX; in TEST_F()
Dbrw_vec4_cmod_propagation.cpp163 ((inst->src[0].swizzle == BRW_SWIZZLE_XXXX && in opt_cmod_propagation_local()
Dbrw_vec4_visitor.cpp428 tmp_src.swizzle = BRW_SWIZZLE_XXXX; in emit_pack_half_2x16()
482 src0.swizzle = BRW_SWIZZLE_XXXX; in emit_unpack_unorm_4x8()
504 src0.swizzle = BRW_SWIZZLE_XXXX; in emit_unpack_snorm_4x8()
952 mcs.swizzle = BRW_SWIZZLE_XXXX; in emit_texture()
Dbrw_clip_util.c231 brw_MOV(p, t_nopersp, brw_swizzle(t_nopersp, BRW_SWIZZLE_XXXX)); in brw_clip_interp_vertex()
Dbrw_vec4_nir.cpp295 return swizzle(src_reg(dst), BRW_SWIZZLE_XXXX); in setup_imm_df()
323 return swizzle(src_reg(retype(tmp, BRW_REGISTER_TYPE_DF)), BRW_SWIZZLE_XXXX); in setup_imm_df()
1586 op[0].swizzle = BRW_SWIZZLE_XXXX; in nir_emit_alu()
1625 op[0].swizzle = brw_compose_swizzle(BRW_SWIZZLE_XXXX, op[0].swizzle); in nir_emit_alu()
Dbrw_eu_emit.c1027 src0.swizzle = BRW_SWIZZLE_XXXX; \
1029 src1.swizzle = BRW_SWIZZLE_XXXX; \
1031 src2.swizzle = BRW_SWIZZLE_XXXX; \
1057 src0.swizzle = BRW_SWIZZLE_XXXX; \
1059 src1.swizzle = BRW_SWIZZLE_XXXX; \
1061 src2.swizzle = BRW_SWIZZLE_XXXX; \
3496 stride(brw_swizzle(idx, BRW_SWIZZLE_XXXX), 4, 4, 1)); in brw_broadcast()
Dbrw_fs_generator.cpp769 case BRW_SWIZZLE_XXXX: in generate_quad_swizzle()
1365 src0.swizzle = BRW_SWIZZLE_XXXX; in generate_ddx()
1441 src0.swizzle = BRW_SWIZZLE_XXXX; in generate_ddy()
Dbrw_vec4_generator.cpp1452 if (reg.swizzle != BRW_SWIZZLE_XXXX) { in generate_mov_indirect()
Dbrw_vec4.cpp2382 case BRW_SWIZZLE_XXXX: in is_gen7_supported_64bit_swizzle()
Dbrw_fs.cpp380 case BRW_SWIZZLE_XXXX: in has_source_and_destination_hazard()
/external/igt-gpu-tools/assembler/
Dbrw_reg.h75 #define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0) macro
84 return (swiz == BRW_SWIZZLE_XXXX || in brw_is_single_value_swizzle()
294 BRW_SWIZZLE_XXXX, in brw_vec1_reg()
560 BRW_SWIZZLE_XXXX, in brw_notification_1_reg()
/external/mesa3d/docs/relnotes/
D19.0.0.rst2200 - intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar region