Searched refs:BaseOp2 (Results 1 – 9 of 9) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.h | 136 const MachineOperand &BaseOp2,
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| D | AArch64InstrInfo.cpp | 2367 const MachineOperand &BaseOp2, in shouldClusterMemOps() argument
2370 const MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
2371 if (BaseOp1.getType() != BaseOp2.getType()) in shouldClusterMemOps()
2378 if (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) in shouldClusterMemOps()
2416 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps()
2422 BaseOp2.getIndex(), Offset2, SecondOpc); in shouldClusterMemOps()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 2351 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps() local
2362 if ((BaseOp1.isReg() != BaseOp2.isReg()) || in shouldClusterMemOps()
2363 (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) || in shouldClusterMemOps()
2364 (BaseOp1.isFI() && BaseOp1.getIndex() != BaseOp2.getIndex())) in shouldClusterMemOps()
2370 const MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
2392 assert(Base1 == &BaseOp1 && Base2 == &BaseOp2 && in shouldClusterMemOps()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 1272 const MachineOperand &BaseOp2, in shouldClusterMemOps() argument
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 773 const MachineOperand *BaseOp1, *BaseOp2; in addLoopCarriedDependences() local
778 TII->getMemOperandWithOffset(MI, BaseOp2, Offset2, in addLoopCarriedDependences()
780 if (BaseOp1->isIdenticalTo(*BaseOp2) && in addLoopCarriedDependences()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachinePipeliner.cpp | 694 const MachineOperand *BaseOp1, *BaseOp2; in addLoopCarriedDependences() local
697 TII->getMemOperandWithOffset(MI, BaseOp2, Offset2, TRI)) { in addLoopCarriedDependences()
698 if (BaseOp1->isIdenticalTo(*BaseOp2) && in addLoopCarriedDependences()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 190 const MachineOperand &BaseOp2,
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| D | SIInstrInfo.cpp | 404 const MachineOperand &BaseOp2) { in memOpsHaveSameBasePtr() argument
407 if (!BaseOp1.isReg() || !BaseOp2.isReg()) in memOpsHaveSameBasePtr()
410 if (BaseOp1.isIdenticalTo(BaseOp2)) in memOpsHaveSameBasePtr()
437 const MachineOperand &BaseOp2, in shouldClusterMemOps() argument
440 const MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
442 if (!memOpsHaveSameBasePtr(FirstLdSt, BaseOp1, SecondLdSt, BaseOp2)) in shouldClusterMemOps()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 2633 const MachineOperand &BaseOp2 = *BaseOps2.front(); in shouldClusterMemOps() local
2635 const MachineInstr &SecondLdSt = *BaseOp2.getParent(); in shouldClusterMemOps()
2636 if (BaseOp1.getType() != BaseOp2.getType()) in shouldClusterMemOps()
2643 if (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg()) in shouldClusterMemOps()
2681 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) && in shouldClusterMemOps()
2687 BaseOp2.getIndex(), Offset2, SecondOpc); in shouldClusterMemOps()
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