Searched refs:BaseOpA (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 103 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
106 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
108 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 103 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
106 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
108 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 600 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
603 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
605 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfo.cpp | 668 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
671 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
673 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 4295 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
4298 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
4300 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 5080 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
5083 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
5085 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 935 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
951 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, WidthA, TRI) && in areMemAccessesTriviallyDisjoint()
953 if (BaseOpA->isIdenticalTo(*BaseOpB)) { in areMemAccessesTriviallyDisjoint()
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| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 1052 const MachineOperand *BaseOpA = nullptr, *BaseOpB = nullptr; in areMemAccessesTriviallyDisjoint() local
1071 if (getMemOperandWithOffsetWidth(MIa, BaseOpA, OffsetA, OffsetAIsScalable, in areMemAccessesTriviallyDisjoint()
1075 if (BaseOpA->isIdenticalTo(*BaseOpB) && in areMemAccessesTriviallyDisjoint()
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