| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZHazardRecognizer.cpp | 51 assert((SC->NumMicroOps != 2 || (SC->BeginGroup && !SC->EndGroup)) && in getNumDecoderSlots()
53 assert((SC->NumMicroOps < 3 || (SC->BeginGroup && SC->EndGroup)) && in getNumDecoderSlots()
99 if (SC->BeginGroup) in fitsIntoCurrentGroup()
196 if (SC->BeginGroup && SC->EndGroup) in dumpSU()
198 else if (SC->BeginGroup) in dumpSU()
347 if (SC->BeginGroup) { in groupingCost()
|
| D | SystemZSchedule.td | 19 def BeginGroup : SchedWrite;
|
| D | SystemZMachineScheduler.cpp | 255 bool AffectsGrouping = (SC->isValid() && (SC->BeginGroup || SC->EndGroup)); in releaseTopNode()
|
| D | SystemZScheduleZ196.td | 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; }
43 let BeginGroup = 1;
48 let BeginGroup = 1;
53 let BeginGroup = 1;
94 let BeginGroup = 1;
|
| D | SystemZScheduleZEC12.td | 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; }
43 let BeginGroup = 1;
48 let BeginGroup = 1;
53 let BeginGroup = 1;
97 let BeginGroup = 1;
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZHazardRecognizer.cpp | 51 assert((SC->NumMicroOps != 2 || (SC->BeginGroup && !SC->EndGroup)) && in getNumDecoderSlots()
53 assert((SC->NumMicroOps < 3 || (SC->BeginGroup && SC->EndGroup)) && in getNumDecoderSlots()
99 if (SC->BeginGroup) in fitsIntoCurrentGroup()
196 if (SC->BeginGroup && SC->EndGroup) in dumpSU()
198 else if (SC->BeginGroup) in dumpSU()
347 if (SC->BeginGroup) { in groupingCost()
|
| D | SystemZSchedule.td | 19 def BeginGroup : SchedWrite;
|
| D | SystemZMachineScheduler.cpp | 255 bool AffectsGrouping = (SC->isValid() && (SC->BeginGroup || SC->EndGroup)); in releaseTopNode()
|
| D | SystemZScheduleZEC12.td | 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; }
43 let BeginGroup = 1;
48 let BeginGroup = 1;
53 let BeginGroup = 1;
97 let BeginGroup = 1;
|
| D | SystemZScheduleZ196.td | 38 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; }
43 let BeginGroup = 1;
48 let BeginGroup = 1;
53 let BeginGroup = 1;
94 let BeginGroup = 1;
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMScheduleM7.td | 114 let BeginGroup = 1;
121 let BeginGroup = 1;
128 let BeginGroup = 1;
135 let BeginGroup = 1;
142 let BeginGroup = 1;
162 let BeginGroup = 1;
355 let BeginGroup = 1;
359 let BeginGroup = 1;
363 let BeginGroup = 1;
367 let BeginGroup = 1;
[all …]
|
| /external/skia/tools/viewer/ |
| D | MSKPSlide.cpp | 35 ImGui::BeginGroup(); in draw()
81 ImGui::BeginGroup(); in draw()
|
| /external/llvm/include/llvm/MC/ |
| D | MCSchedule.h | 109 bool BeginGroup; member
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/ |
| D | MCSchedule.h | 118 bool BeginGroup : 1; member
|
| /external/llvm-project/llvm/include/llvm/MC/ |
| D | MCSchedule.h | 118 bool BeginGroup : 1; member
|
| /external/llvm-project/llvm/lib/MCA/Stages/ |
| D | DispatchStage.cpp | 166 if (Desc.BeginGroup && AvailableEntries != DispatchWidth) in isAvailable()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/Stages/ |
| D | DispatchStage.cpp | 166 if (Desc.BeginGroup && AvailableEntries != DispatchWidth) in isAvailable()
|
| /external/llvm-project/llvm/lib/MCA/ |
| D | InstrBuilder.cpp | 571 ID->BeginGroup = SCDesc.BeginGroup; in createInstrDescImpl()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/ |
| D | InstrBuilder.cpp | 568 ID->BeginGroup = SCDesc.BeginGroup; in createInstrDescImpl()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 91 return SC->BeginGroup; in mustBeginGroup()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 91 return SC->BeginGroup; in mustBeginGroup()
|
| /external/llvm-project/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 1000 SCDesc.BeginGroup = false; in GenSchedClassTables()
1100 SCDesc.BeginGroup |= WriteRes->getValueAsBit("BeginGroup"); in GenSchedClassTables()
1102 SCDesc.BeginGroup |= WriteRes->getValueAsBit("SingleIssue"); in GenSchedClassTables()
1326 << ", " << ( MCDesc.BeginGroup ? "true" : "false" ) in EmitSchedClassTables()
|
| /external/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 815 SCDesc.BeginGroup = false; in GenSchedClassTables()
923 SCDesc.BeginGroup |= WriteRes->getValueAsBit("BeginGroup"); in GenSchedClassTables()
1133 << ", " << ( MCDesc.BeginGroup ? "true" : "false" ) in EmitSchedClassTables()
|
| /external/llvm-project/llvm/include/llvm/MCA/ |
| D | Instruction.h | 376 bool BeginGroup; member
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/ |
| D | Instruction.h | 376 bool BeginGroup; member
|