Searched refs:BitN (Results 1 – 12 of 12) sorted by relevance
/external/llvm/lib/Target/Hexagon/ |
D | BitTracker.h | 255 const BitValue &operator[](uint16_t BitN) const { 256 assert(BitN < Bits.size()); 257 return Bits[BitN]; 259 BitValue &operator[](uint16_t BitN) { 260 assert(BitN < Bits.size()); 261 return Bits[BitN]; 387 RegisterCell eSET(const RegisterCell &A1, uint16_t BitN) const; 388 RegisterCell eCLR(const RegisterCell &A1, uint16_t BitN) const;
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D | BitTracker.cpp | 642 uint16_t BitN) const { in eSET() 643 assert(BitN < A1.width()); in eSET() 645 Res[BitN] = BitValue::One; in eSET() 651 uint16_t BitN) const { in eCLR() 652 assert(BitN < A1.width()); in eCLR() 654 Res[BitN] = BitValue::Zero; in eCLR()
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D | HexagonGenInsert.cpp | 292 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {} in RegisterCellBitCompareSel() 296 const unsigned BitN; member 337 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()() 338 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()()
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | BitTracker.h | 307 const BitValue &operator[](uint16_t BitN) const { 308 assert(BitN < Bits.size()); 309 return Bits[BitN]; 311 BitValue &operator[](uint16_t BitN) { 312 assert(BitN < Bits.size()); 313 return Bits[BitN]; 438 RegisterCell eSET(const RegisterCell &A1, uint16_t BitN) const; 439 RegisterCell eCLR(const RegisterCell &A1, uint16_t BitN) const;
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D | BitTracker.cpp | 628 uint16_t BitN) const { in eSET() 629 assert(BitN < A1.width()); in eSET() 631 Res[BitN] = BitValue::One; in eSET() 636 uint16_t BitN) const { in eCLR() 637 assert(BitN < A1.width()); in eCLR() 639 Res[BitN] = BitValue::Zero; in eCLR()
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D | HexagonGenInsert.cpp | 315 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {} in RegisterCellBitCompareSel() 321 const unsigned BitN; member 361 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()() 362 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | BitTracker.h | 306 const BitValue &operator[](uint16_t BitN) const { 307 assert(BitN < Bits.size()); 308 return Bits[BitN]; 310 BitValue &operator[](uint16_t BitN) { 311 assert(BitN < Bits.size()); 312 return Bits[BitN]; 437 RegisterCell eSET(const RegisterCell &A1, uint16_t BitN) const; 438 RegisterCell eCLR(const RegisterCell &A1, uint16_t BitN) const;
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D | BitTracker.cpp | 628 uint16_t BitN) const { in eSET() 629 assert(BitN < A1.width()); in eSET() 631 Res[BitN] = BitValue::One; in eSET() 636 uint16_t BitN) const { in eCLR() 637 assert(BitN < A1.width()); in eCLR() 639 Res[BitN] = BitValue::Zero; in eCLR()
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D | HexagonGenInsert.cpp | 315 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {} in RegisterCellBitCompareSel() 321 const unsigned BitN; member 361 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()() 362 uint16_t Bit2 = (VR2 == SelR) ? SelB : BitN; in operator ()()
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/external/vixl/src/aarch64/ |
D | constants-aarch64.h | 115 V_(BitN, 22, 22, ExtractBits) \
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D | assembler-aarch64.h | 6093 static Instr BitN(unsigned bitn, unsigned reg_size) { in BitN() function
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D | assembler-aarch64.cc | 5452 Emit(SF(rd) | LogicalImmediateFixed | op | BitN(n, reg_size) | in LogicalImmediate()
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