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Searched refs:BusDevice (Results 1 – 18 of 18) sorted by relevance

/external/crosvm/docs/
Darchitecture.md22 …le of having with the main process is via the proxied trait methods of `BusDevice`, shared memory …
46 ### `Bus`/`BusDevice`
48BusDevice` trait. The `Bus` structure is a virtual computer bus used to emulate the memory-mapped …
50 … if a `BusDevice` was inserted at base address 0x1000 with a length of 0x40, a 4-byte read by a VC…
52BusDevice` is reference counted and wrapped in a mutex, so implementations of `BusDevice` need not…
54BusDevice` directly, but some are examples are `i8042` and `Serial`. With the exception of PCI dev…
58 …ment `BusDevice` and call into a `PciRoot` with higher level calls to `config_space_read`/`config_…
62BusDevice` for `Bus`s, contains all the `PciDevice` trait objects. Because of a shortcut (or hack)…
/external/crosvm/devices/src/
Di8042.rs7 use crate::{BusAccessInfo, BusDevice};
23 impl BusDevice for I8042Device {
Dproxy.rs17 use crate::{BusAccessInfo, BusDevice};
71 fn child_proc<D: BusDevice>(tube: Tube, device: &mut D) { in child_proc()
144 pub fn new<D: BusDevice>( in new()
223 impl BusDevice for ProxyDevice {
310 impl BusDevice for EchoDevice {
Dbus.rs58 pub trait BusDevice: Send { trait
87 pub trait BusDeviceSync: BusDevice + Sync {
160 OuterSync(Arc<Mutex<dyn BusDevice>>),
213 pub fn insert(&mut self, device: Arc<Mutex<dyn BusDevice>>, base: u64, len: u64) -> Result<()> { in insert() argument
330 impl BusDevice for DummyDevice {
340 impl BusDevice for ConstantDevice {
Ddirect_io.rs5 use crate::{BusAccessInfo, BusDevice, BusDeviceSync};
42 impl BusDevice for DirectIo {
Dcmos.rs9 use crate::{BusAccessInfo, BusDevice};
49 impl BusDevice for Cmos {
Dpl030.rs9 use crate::{BusAccessInfo, BusDevice};
73 impl BusDevice for Pl030 {
Dacpi.rs5 use crate::{BusAccessInfo, BusDevice, BusResumeDevice};
54 impl BusDevice for ACPIPMResource {
Dlib.rs34 pub use self::bus::{Bus, BusAccessInfo, BusDevice, BusDeviceSync, BusRange, BusResumeDevice};
Dserial.rs15 use crate::{BusDevice, ProtectionType, SerialDevice};
309 impl BusDevice for Serial {
Dbat.rs5 use crate::{BusAccessInfo, BusDevice};
425 impl BusDevice for GoldfishBattery {
Dpit.rs31 use crate::BusDevice;
213 impl BusDevice for Pit {
/external/crosvm/devices/src/pci/
Dpci_root.rs17 use crate::{BusAccessInfo, BusDevice};
128 devices: BTreeMap<PciAddress, Arc<Mutex<dyn BusDevice>>>,
156 pub fn add_device(&mut self, address: PciAddress, device: Arc<Mutex<dyn BusDevice>>) { in add_device() argument
249 impl BusDevice for PciConfigIo {
309 impl BusDevice for PciConfigMmio {
Dpci_device.rs18 use crate::{BusAccessInfo, BusDevice};
133 impl<T: PciDevice> BusDevice for T {
/external/crosvm/arch/src/
Dlib.rs23 Bus, BusDevice, BusError, IrqChip, PciAddress, PciDevice, PciDeviceError, PciInterruptPin,
399 let arced_dev: Arc<Mutex<dyn BusDevice>> = if let Some(jail) = jail { in generate_pci_root()
/external/crosvm/devices/src/irqchip/
Dioapic.rs13 use crate::BusDevice;
88 impl BusDevice for Ioapic {
Dpic.rs16 use crate::BusDevice;
86 impl BusDevice for Pic {
/external/crosvm/x86_64/src/
Dlib.rs979 impl devices::BusDevice for NoDevice { in setup_io_bus()