| /external/arm-trusted-firmware/include/common/ |
| D | bl_common.ld.h | 149 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
153 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
171 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
174 . = ALIGN(CACHE_WRITEBACK_GRANULE); \
|
| /external/arm-trusted-firmware/include/lib/el3_runtime/ |
| D | cpu_data.h | 55 CACHE_WRITEBACK_GRANULE - 1) / \
56 CACHE_WRITEBACK_GRANULE) * \
57 CACHE_WRITEBACK_GRANULE)
121 } __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t;
|
| /external/arm-trusted-firmware/plat/nvidia/tegra/scat/ |
| D | bl31.scat | 181 __BAKERY_LOCKS__ AlignExpr(ImageLimit(__BSS__), CACHE_WRITEBACK_GRANULE) FIXED
186 …__BAKERY_LOCKS_EPILOGUE__ AlignExpr(ImageLimit(__BAKERY_LOCKS__), CACHE_WRITEBACK_GRANULE) FIXED E…
210 __PMF_TIMESTAMP__ AlignExpr(+0, CACHE_WRITEBACK_GRANULE) FIXED EMPTY CACHE_WRITEBACK_GRANULE
215 …__PMF_TIMESTAMP_EPILOGUE__ AlignExpr(ImageLimit(__PMF_TIMESTAMP__), CACHE_WRITEBACK_GRANULE) FIXED…
219 * CACHE_WRITEBACK_GRANULE boundary
|
| /external/arm-trusted-firmware/plat/layerscape/board/ls1043/include/ |
| D | ls_def.h | 100 #define CACHE_WRITEBACK_GRANULE (1 << LS_CACHE_WRITEBACK_SHIFT) macro
105 #define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE)
|
| /external/arm-trusted-firmware/plat/qti/sc7180/inc/ |
| D | platform_def.h | 94 #define CACHE_WRITEBACK_GRANULE (1 << ARM_CACHE_WRITEBACK_SHIFT) macro
99 #define PLAT_PERCPU_BAKERY_LOCK_SIZE (1 * CACHE_WRITEBACK_GRANULE)
|
| /external/arm-trusted-firmware/bl32/tsp/ |
| D | tsp_private.h | 48 } __aligned(CACHE_WRITEBACK_GRANULE) work_statistics_t;
52 } __aligned(CACHE_WRITEBACK_GRANULE) tsp_args_t;
|
| /external/arm-trusted-firmware/bl1/ |
| D | bl1_main.c | 116 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); in bl1_main()
118 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); in bl1_main()
|
| /external/arm-trusted-firmware/plat/common/aarch32/ |
| D | platform_up_stack.S | 47 PLATFORM_STACK_SIZE, 1, CACHE_WRITEBACK_GRANULE
|
| /external/arm-trusted-firmware/plat/common/aarch64/ |
| D | platform_up_stack.S | 50 PLATFORM_STACK_SIZE, 1, CACHE_WRITEBACK_GRANULE
|
| D | platform_mp_stack.S | 61 CACHE_WRITEBACK_GRANULE
|
| /external/arm-trusted-firmware/plat/hisilicon/hikey/include/ |
| D | platform_def.h | 83 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/drivers/ufs/ |
| D | ufs.c | 599 unsigned char data[CACHE_WRITEBACK_GRANULE << 1]; in ufs_read_capacity()
611 buf = (buf + CACHE_WRITEBACK_GRANULE - 1) & in ufs_read_capacity()
612 ~(CACHE_WRITEBACK_GRANULE - 1); in ufs_read_capacity()
613 memset((void *)buf, 0, CACHE_WRITEBACK_GRANULE); in ufs_read_capacity()
614 flush_dcache_range(buf, CACHE_WRITEBACK_GRANULE); in ufs_read_capacity()
634 inv_dcache_range(buf, CACHE_WRITEBACK_GRANULE); in ufs_read_capacity()
|
| /external/arm-trusted-firmware/plat/amlogic/g12a/include/ |
| D | platform_def.h | 54 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/amlogic/gxl/include/ |
| D | platform_def.h | 54 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/amlogic/gxbb/include/ |
| D | platform_def.h | 57 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/amlogic/axg/include/ |
| D | platform_def.h | 57 #define CACHE_WRITEBACK_GRANULE (U(1) << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/allwinner/common/include/ |
| D | platform_def.h | 35 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/imx/imx8qx/include/ |
| D | platform_def.h | 16 #define CACHE_WRITEBACK_GRANULE 64 macro
|
| /external/arm-trusted-firmware/plat/rockchip/rk3288/include/ |
| D | platform_def.h | 82 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/xilinx/versal/include/ |
| D | platform_def.h | 82 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/rockchip/rk3328/include/ |
| D | platform_def.h | 100 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/socionext/uniphier/include/ |
| D | platform_def.h | 17 #define CACHE_WRITEBACK_GRANULE (1 << (CACHE_WRITEBACK_SHIFT)) macro
|
| /external/arm-trusted-firmware/plat/imx/imx8qm/include/ |
| D | platform_def.h | 16 #define CACHE_WRITEBACK_GRANULE 64 macro
|
| /external/arm-trusted-firmware/plat/rockchip/rk3399/include/ |
| D | platform_def.h | 84 #define CACHE_WRITEBACK_GRANULE (1 << CACHE_WRITEBACK_SHIFT) macro
|
| /external/arm-trusted-firmware/plat/layerscape/common/ |
| D | ls_bl2_setup.c | 17 static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
|