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Searched refs:CALTIMING3_WR_TO_RD_DIFF_CHIP (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/plat/intel/soc/agilex/include/
Dagilex_memory_controller.h85 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12) macro
/external/arm-trusted-firmware/plat/intel/soc/stratix10/include/
Ds10_memory_controller.h84 #define CALTIMING3_WR_TO_RD_DIFF_CHIP(value) (((value) & 0x0003f000) >> 12) macro
/external/arm-trusted-firmware/plat/intel/soc/agilex/soc/
Dagilex_memory_controller.c225 bus_wr_to_rd = CALTIMING3_WR_TO_RD_DIFF_CHIP(data); in configure_ddr_sched_ctrl_regs()
/external/arm-trusted-firmware/plat/intel/soc/stratix10/soc/
Ds10_memory_controller.c254 bus_wr_to_rd = CALTIMING3_WR_TO_RD_DIFF_CHIP(data); in configure_ddr_sched_ctrl_regs()