Searched refs:CCU_WIN_CR_OFFSET (Results 1 – 2 of 2) sorted by relevance
| /external/arm-trusted-firmware/drivers/marvell/ |
| D | ccu.c | 77 win_cr = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in dump_ccu()
116 return mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)) & in ccu_is_win_enabled()
141 mmio_write_32(CCU_WIN_CR_OFFSET(ap_index, win_id), ccu_win_reg); in ccu_enable_win()
153 win_reg = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_disable_win()
155 mmio_write_32(CCU_WIN_CR_OFFSET(ap_index, win_id), win_reg); in ccu_disable_win()
192 target = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_temp_win_remove()
225 target = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_dram_target_get()
242 dram_cr = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_dram_target_set()
245 mmio_write_32(CCU_WIN_CR_OFFSET(ap_index, win_id), dram_cr); in ccu_dram_target_set()
281 buffer[idx++] = mmio_read_32(CCU_WIN_CR_OFFSET(ap_id, win_id)); in ccu_save_win_range()
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| /external/arm-trusted-firmware/include/drivers/marvell/ |
| D | ccu.h | 18 #define CCU_WIN_CR_OFFSET(ap, win) (MVEBU_CCU_BASE(ap) + 0x0 + \ macro
37 #define CCU_SRAM_WIN_CR CCU_WIN_CR_OFFSET(MVEBU_AP0, 1)
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