/external/llvm-project/llvm/lib/Target/VE/ |
D | VE.h | 57 CC_GE = 5 + 6, // Greater or Equal enumerator 98 case VECC::CC_GE: return "ge"; in VECondCodeToString() 134 .Case("ge", VECC::CC_GE) in stringToVEFCondCode() 174 case VECC::CC_GE: in VECondCodeToVal() 234 return VECC::CC_GE; in VEValToCondCode()
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D | VEISelDAGToDAG.cpp | 78 return VECC::CC_GE; in fpCondCode2Fcc()
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D | VEInstrInfo.cpp | 67 case VECC::CC_GE: in GetOppositeBranchCondition() 78 return VECC::CC_GE; in GetOppositeBranchCondition()
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D | VEInstrIntrinsicVL.gen.td | 1178 def : Pat<(int_ve_vl_vfmkdge_mvl v256f64:$vz, i32:$vl), (VFMKDvl CC_GE, v256f64:$vz, i32:$vl)>; 1179 def : Pat<(int_ve_vl_vfmkdge_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (VFMKDvml CC_GE, v256f64:$vz, … 1206 def : Pat<(int_ve_vl_vfmksge_mvl v256f64:$vz, i32:$vl), (VFMKSvl CC_GE, v256f64:$vz, i32:$vl)>; 1207 def : Pat<(int_ve_vl_vfmksge_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (VFMKSvml CC_GE, v256f64:$vz, … 1242 def : Pat<(int_ve_vl_pvfmksloge_mvl v256f64:$vz, i32:$vl), (PVFMKSLOvl CC_GE, v256f64:$vz, i32:$vl)… 1243 def : Pat<(int_ve_vl_pvfmksupge_mvl v256f64:$vz, i32:$vl), (PVFMKSUPvl CC_GE, v256f64:$vz, i32:$vl)… 1244 def : Pat<(int_ve_vl_pvfmksloge_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (PVFMKSLOvml CC_GE, v256f64… 1245 def : Pat<(int_ve_vl_pvfmksupge_mvml v256f64:$vz, v256i1:$vm, i32:$vl), (PVFMKSUPvml CC_GE, v256f64… 1290 def : Pat<(int_ve_vl_pvfmksge_Mvl v256f64:$vz, i32:$vl), (VFMKSyvl CC_GE, v256f64:$vz, i32:$vl)>; 1291 def : Pat<(int_ve_vl_pvfmksge_MvMl v256f64:$vz, v512i1:$vm, i32:$vl), (VFMKSyvyl CC_GE, v256f64:$vz…
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D | VEInstrInfo.td | 483 def CC_GE : CC_VAL<11>; // Greater or Equal
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/VE/ |
D | VE.h | 55 CC_GE = 5 + 6, // Greater or Equal enumerator 82 case VECC::CC_GE: return "ge"; in VECondCodeToString()
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D | VEInstrInfo.td | 97 def CC_GE : CC_VAL<11>; // Greater or Equal
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_emit_gv100.h | 162 case CC_GE : data = 0x06; break; in emitCond3() 182 case CC_GE: data = 0x06; break; in emitCond4()
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D | nv50_ir.h | 339 CC_GE = 6, enumerator
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D | nv50_ir.cpp | 478 case CC_GE: return reg.data.f32 >= fval; in compare()
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D | nv50_ir_emit_gm107.cpp | 385 case CC_GE : data = 0x06; break; in emitCond3() 407 case CC_GE: data = 0x06; break; in emitCond4()
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D | nv50_ir_lowering_nv50.cpp | 536 bld.mkCmp(OP_SET, CC_GE, TYPE_U32, (s = bld.getSSA()), TYPE_U32, m, b); in handleDIV()
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D | nv50_ir_emit_nv50.cpp | 222 case CC_GE: enc = 0x6; break; in emitCondCode()
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D | nv50_ir_emit_gk110.cpp | 283 case CC_GE: n = 0x06; break; in emitCondCode()
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D | nv50_ir_emit_nvc0.cpp | 260 case CC_GE: val = 0x6; break; in emitCondCode()
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D | nv50_ir_from_nir.cpp | 706 return CC_GE; in getCondCode()
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D | nv50_ir_from_tgsi.cpp | 707 return CC_GE; in getSetCond()
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D | nv50_ir_peephole.cpp | 1369 case CC_GE: cc = CC_TR; break; // bool >= 0 -- this is always true in opnd()
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