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Searched refs:CDRU_GENPLL5_CONTROL1__CHNL2_RAID_AE_CLK (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dcrmu_def.h134 #define CDRU_GENPLL5_CONTROL1__CHNL2_RAID_AE_CLK BIT(8) macro
/external/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dfsx.c465 CDRU_GENPLL5_CONTROL1__CHNL2_RAID_AE_CLK); in fs4_disable_clocks()